- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄374396 > KT8555 (SAMSUNG SEMICONDUCTOR CO. LTD.) TIME SLOT ASSIGNMENT CIRCUIT PDF資料下載
參數(shù)資料
| 型號(hào)： | KT8555 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | TIME SLOT ASSIGNMENT CIRCUIT |
| 中文描述： | 時(shí)間槽分配電路 |
| 文件頁數(shù)： | 3/6頁 |
| 文件大小： | 96K |
| 代理商： | KT8555 |
KT8555 TIME SLOT ASSIGNMENT CIRCUIT
ELECTRICAL CHARACTERISTICS
(Unless otherwise noted; V
CC
= 5.0V
±
5%, Ta = 0
°
C ~70
°
C)
Characteristic
Symbol
Test Conditions
Min
Typ
Max
Unit
Operating Current
Input Voltage High
Input Voltage Low
Input Current 1
I
CC
V
IH
V
IL
I
I1
I
I2
V
OH
BCLK = 2.048MHz, all outputs open
1
1.5
mA
V
V
μ
A
μ
A
V
V
V
2.0
0.7
1
All Inputs Except Mode, V
IL
<V
IN
<V
IH
Mode, V
IN
= 0V
FS
X
and FS
R
Outputs, I
OH
= 3mA
FS
X
and FS
R
Outputs, I
OL
= 3mA
TS
X
output, I
OL
= 3mA
-1
Input Current 2
-100
Output Voltage High
2.4
0.4
0.4
t
R (CK)
t
F(CK)
t
D (TSX L)
t
D (TSX H)
t
H (BFS)
t
H (FSB)
BCLK, CLK
C
50
nS
Delay to TS
X
Low
Delay to TS
X
High
Hold Time from BCLK to Frame Sync
Set-Up Time from Frame Sync to BLCK
Delay Time from BLCK Low to FX
X/R
0-3
High or Low
Hold Time from Channel Select to CLKC
Set-Up Time from Channel Select to CLKC
Period of Clock
Width of Clock High
Width of Clock Low
Set-Up Time from D
C
to CLKC
Hold Time from CLKC to D
C
Set-Up Time from CS to CLKC
Hold Time from CLKC to CS
C
L
= 50pF
R
L
= 1K
to V
CC
140
100
nS
nS
30
50
30
nS
nS
C
L
= 50pF
50
nS
t
H (CSC)
t
SU (CSC)
t
CK
t
W (CKH)
t
W (CLK)
t
SU (Dc C)
t
H (CDc)
t
SU (CC)
t
H (CC)
50
30
240
50
50
30
50
30
100
nS
nS
nS
nS
nS
nS
nS
nS
nS
BCLK, CLK
C
BCLK, CLK
C
BCLK, CLK
C
1
2
3
4
5
6
7
8
1
2
CLK
C
CS
CH0, CH1
AND CH2
D
C
BCLK
XSYC OR
RSY
C
FS
X
OR FS
R
TS
X
t
HCD
t
H(CC)
t
SU(CC)
t
W(CKH)
t
W(CKL)
t
R(CK)
t
F(CK)
t
H(CC)
t
SU(CC)
t
SU(CSC)
t
H(CSC)
t
D
t
SU(DcC)
t
SU(FSB)
t
DT(SxL)
t
WCH
t
H(BFS)
t
FS
t
RS
t
F(CK)
t
W(CKL)
t
R(CK)
3
4
5
6
7
8
t
D(TSxH) MIN
t
D(TSxH) MAX
t
D
OUTPUT
CONTROL INTERFACE
Output Voltage Low
V
OL
Rise and Fall Time of Clock
t
D
TIMING DIAGRAM
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| KT8555J | TIME SLOT ASSIGNMENT CIRCUIT |
| KT8592 | 4 x 4 CROSSPOINT SWITCH WITH CONTROL MEMORY |
| KT8592N | 4 x 4 CROSSPOINT SWITCH WITH CONTROL MEMORY |
| KT922 | Silizium-HF-Leistungstransistor in Epitaxie-Planar-Technologie |
| KT922A | Silizium-HF-Leistungstransistor in Epitaxie-Planar-Technologie |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| KT8555J | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:TIME SLOT ASSIGNMENT CIRCUIT |
| KT8557B | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:1 CHIP CODECS |
| KT8592 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:4 x 4 CROSSPOINT SWITCH WITH CONTROL MEMORY |
| KT8592N | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:4 x 4 CROSSPOINT SWITCH WITH CONTROL MEMORY |
| KT860 | 制造商:OPTEK 制造商全稱:OPTEK 功能描述:SLOTTED OPTICAL SWITCHES PHOTOTRAMSISTOR OUTPUT |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。