參數(shù)資料
型號: KT8555
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: TIME SLOT ASSIGNMENT CIRCUIT
中文描述: 時間槽分配電路
文件頁數(shù): 2/6頁
文件大?。?/td> 96K
代理商: KT8555
KT8555 TIME SLOT ASSIGNMENT CIRCUIT
PIN DESCRIPTION
ABSOLUTE MAXIMUM RATINGS
(Ta = 25
°
C)
Pin No
Symbol
Description
3
1
18
16
FS
X
0
FS
X
1
FS
X
2
FS
X
3
A frame sync output which is normally low, and goes active-high for 8 cycles of
BCLK when a valid transmit time slot assignment is made.
4
2
19
17
FS
R
0
FS
R
1
FS
R
2
FS
R
3
A frame sync output which is normally low, and goes active-high for 8 cycles of
BCLK when a valid receive time slot assignment is made.
5
TS
X
This pin pulls low during any active transmit time slot. (N-channel open drain)
6
D
C
The input for an 8 bit serial control word. X is the first bit clocked in.
7
CLK
C
The clock input for the control interface.
8
CS
The active-low chip select for the control interface.
9
MODE
Mode 1 = Open or V
CC
Mode 2 = Gnd
10
GND
Ground
11
BCLK
The bit clock input (2.048 MHz)
12
XSY
C
The transmit TSO sync pulse input. Must be synchronous with BCLK.
13
RSY
C
/CH2
The transmit time slot 0 sync pulse input. Must be synchronous with BCLK.
In mode 1 this input is the receive time slot 0 sync pulse, RSY
C
, which must be
synchronous with BCLK. In mode 2 this is the CH2 input for the MSB of the
channel select word.
14
CH1
The input for the NSB (next significant bit) of the channel select word.
15
CH0
The input for the LSB (last significant bit) of the channel select word,
which defines the frame sync output affected by the following control word.
20
V
CC
Power supply pin. 5V
±
5%
Characteristic
Symbol
Value
Unit
Positive Supply Voltage
Input Voltage
Output Voltage
Operating Temperature Range
Storage Temperature Range
Lead Temperature (Soldering, 10 secs)
V
CC
V
I
V
O
T
OPR
T
STG
T
LEAD
7.0
V
CC
+ 0.3 ~ - 0.3
V
CC
+ 0.3 ~ - 0.3
- 25 ~ 125
- 65 ~ 150
300
V
V
V
°
C
°
C
°
C
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