Micrel, Inc.
KSZ9021GQ
September 2010
4
M9999-091010-1.2
Contents
Pin Configuration .................................................................................................................................................................. 8
Pin Description ...................................................................................................................................................................... 9
Strapping Options ............................................................................................................................................................... 18
Functional Overview ........................................................................................................................................................... 19
Functional Description: 10Base-T/100Base-TX Transceiver ......................................................................................... 20
100Base-TX Transmit....................................................................................................................................................... 20
100Base-TX Receive........................................................................................................................................................ 20
Scrambler/De-scrambler (100Base-TX only).................................................................................................................... 20
10Base-T Transmit ........................................................................................................................................................... 20
10Base-T Receive ............................................................................................................................................................ 20
Functional Description: 1000Base-T Transceiver........................................................................................................... 21
Analog Echo Cancellation Circuit ..................................................................................................................................... 21
Automatic Gain Control (AGC) ......................................................................................................................................... 21
Analog-to-Digital Converter (ADC) ................................................................................................................................... 21
Timing Recovery Circuit.................................................................................................................................................... 22
Adaptive Equalizer............................................................................................................................................................ 22
Trellis Encoder and Decoder ............................................................................................................................................ 22
Functional Description: Additional 10/100/1000 PHY Features..................................................................................... 22
Auto MDI/MDI-X................................................................................................................................................................ 22
Pair- Swap, Alignment, and Polarity Check...................................................................................................................... 23
Wave Shaping, Slew Rate Control and Partial Response................................................................................................ 23
PLL Clock Synthesizer...................................................................................................................................................... 23
Auto-Negotiation ................................................................................................................................................................. 23
GMII Interface....................................................................................................................................................................... 25
GMII Signal Definition ....................................................................................................................................................... 26
GMII Signal Diagram ........................................................................................................................................................ 26
MII Interface ......................................................................................................................................................................... 27
MII Signal Definition.......................................................................................................................................................... 28
MII Signal Diagram ........................................................................................................................................................... 28
MII Management (MIIM) Interface....................................................................................................................................... 29
Interrupt (INT_N).................................................................................................................................................................. 29
LED Mode............................................................................................................................................................................. 29
4-LED Configuration ......................................................................................................................................................... 30
5-LED Configuration ......................................................................................................................................................... 30
6-LED Configuration ......................................................................................................................................................... 31
NAND Tree Support ............................................................................................................................................................ 32
Power Management ............................................................................................................................................................ 33
Power Saving Mode.......................................................................................................................................................... 33
Software Power Down Mode ............................................................................................................................................ 33
Chip Power Down Mode ................................................................................................................................................... 33
Register Map........................................................................................................................................................................ 34
Register Description ........................................................................................................................................................... 35
IEEE Defined Registers .................................................................................................................................................... 35
Vendor Specific Registers ................................................................................................................................................ 41