參數(shù)資料
型號: KSZ8851SNL TR
廠商: Micrel Inc
文件頁數(shù): 59/80頁
文件大小: 0K
描述: IC CTLR MAC/PHY NON-PCI 32-MLF
產(chǎn)品培訓(xùn)模塊: KSZ8851 10/100 Embedded Controllers
標(biāo)準(zhǔn)包裝: 1
控制器類型: 以太網(wǎng)控制器,MAC/PHY
接口: 總線
電源電壓: 1.8V,2.5V,3.3V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 32-VFQFN 裸露焊盤,32-MLF?
供應(yīng)商設(shè)備封裝: 32-MLF?(5x5)
包裝: 標(biāo)準(zhǔn)包裝
產(chǎn)品目錄頁面: 1081 (CN2011-ZH PDF)
配用: 576-3293-ND - BOARD EVALUATION KSZ8851SNL
其它名稱: 576-3299-6
Micrel, Inc.
KSZ8851SNL/SNLI
August 2009
62
M9999-083109-2.0
Bit
Default
R/W
Description
7-0
0x0C
RW
Go-sleep Time
This value is used to control the minimum period that the no energy event has to be
detected consecutively before the device enters the low power state when the energy
detect mode is on. The unit is 1 sec +/-80%, the default go-sleep time is 12 sec (1s x 12).
Zero time (0x00) is not allowed.
PHY Reset Register (0xD8 – 0xD9): PHYRR
This register contains a control bit to reset PHY block when write an “1”.
Bit
Default
R/W
Description
15-1
-
RW
Reserved.
0
WO
(Self
clear)
PHY Reset Bit
This bit is write only and self clear after write an “1”, it is used to reset PHY block circuitry.
0xDA – 0xDF: Reserved
0xE0 – 0xE3: Reserved
PHY 1 MII-Register Basic Control Register (0xE4 – 0xE5): P1MBCR
This register contains Media Independent Interface (MII) register for port 1 as defined in the IEEE 802.3 specification.
Bit
Default
R/W
Description
Bit is same as:
15
0
RO
Reserved
14
0
RW
Local (far-end) loopback (llb)
1 = perform local loopback at host
(host SPI Tx -> PHY -> host SPI Rx,
see Figure 14)
0 = normal operation
13
1
RW
Force 100
1 = force 100Mbps if AN is disabled (bit 12)
0 = force 10Mbps if AN is disabled (bit 12)
Bit 6 in P1CR
12
1
RW
AN Enable
1 = auto-negotiation enabled.
0 = auto-negotiation disabled.
Bit 7 in P1CR
11-10
0
RW
Reserved
9
0
RW
Restart AN
1 = restart auto-negotiation.
0 = normal operation.
Bit 13 in P1CR
8
1
RW
Force Full Duplex
1 = force full duplex
0 = force half duplex.
if AN is disabled (bit 12) or AN is enabled but failed.
Bit 5 in P1CR
7-6
0
RO
Reserved
5
1
R/W
HP_mdix
1 = HP Auto MDI-X mode.
0 = Micrel Auto MDI-X mode.
Bit 15 in P1SR
4
0
RW
Force MDI-X
1 = force MDI-X.
0 = normal operation.
Bit 9 in P1CR
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