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| 型號： | KSZ8051MNL-EVAL |
| 廠商： | Micrel Inc |
| 文件頁數(shù)： | 21/59頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVALUATION FOR KSZ8051MNL |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 主要目的： | 接口，以太網(wǎng) PHY |
| 嵌入式： | 否 |
| 已用 IC / 零件： | KSZ8051MNL |
| 已供物品： | 板 |
| 相關(guān)產(chǎn)品： | 576-3845-ND - TXRX PHY 10/T100 3.3V 32QFN 576-3777-6-ND - TXRX PHY 10/T100 3.3V MII 32-QFN 576-3777-1-ND - TXRX PHY 10/T100 3.3V MII 32-QFN 576-3777-2-ND - TXRX PHY 10/T100 3.3V MII 32-QFN 576-3732-ND - TXRX PHY 10/T100 3.3V MII 32-QFN |
| 其它名稱： | 576-3865 |
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Micrel, Inc.
KSZ8051MNL/RNL
July 2010
28
M9999-070910-1.0
RMII Back-to-Back Mode (KSZ8051RNL only)
In RMII Back-to-Back mode, a KSZ8051RNL interfaces with another KSZ8051RNL, or a KSZ8041FTL to provide a
complete 100Mbps copper repeater, or media converter solution, respectively.
The KSZ8051RNL devices are configured to RMII Back-to-Back mode after power-up or reset with the following:
Strapping pin CONFIG[2:0] (pins 18, 29, 28) set to ‘101’
A common 50MHz reference clock connected to XI (pin 9)
RMII signals connected as shown in the following table.
KSZ8051RNL (100Base-TX copper)
[Device 1]
KSZ8051RNL (100Base-TX copper)
[Device 2]
Pin Name
Pin Number
Pin Type
Pin Name
Pin Number
Pin Type
CRSDV
18
Output
TXEN
23
Input
RXD1
15
Output
TXD1
25
Input
RXD0
16
Output
TXD0
24
Input
TXEN
23
Input
CRSDV
18
Output
TXD1
25
Input
RXD1
15
Output
TXD0
24
Input
RXD0
16
Output
Table 4. RMII Signal Connection for RMII Back-to-Back Mode (100Base-TX Copper Repeater)
MII Management (MIIM) Interface
The KSZ8051MNL/RNL supports the IEEE 802.3 MII Management Interface, also known as the Management Data Input /
Output (MDIO) Interface. This interface enables upper-layer device, like a MAC processor, to monitor and control the state
of the KSZ8051MNL/RNL. An external device with MIIM capability is used to read the PHY status and/or configure the
PHY settings. Further details on the MIIM interface can be found in Clause 22.2.4 of the IEEE 802.3 Specification.
The MIIM interface consists of the following:
A physical connection that incorporates the clock line (MDC) and the data line (MDIO).
A specific protocol that operates across the aforementioned physical connection that allows the external controller
to communicate with one or more PHY devices.
A set of 16-bit MDIO registers. Registers [0:8] are standard registers, and their functions are defined per the IEEE
802.3 Specification. The additional registers are provided for expanded functionality. See “Register Map” section
for details.
As the default, the KSZ8051MNL/RNL supports unique PHY addresses 1 to 7, and broadcast PHY address 0. The latter is
defined per the IEEE 802.3 Specification, and can be used to read/write to a single KSZ8051MNL/RNL device, or write to
multiple KSZ8051MNL/RNL devices simultaneously.
Optionally, PHY address 0 can be disabled as the broadcast address by either hardware pin strapping (B-CAST_OFF, pin
19) or software (register 16h, bit 9), and assigned as a unique PHY address.
The PHYAD[2:0] strapping pins are used to assigned a unique PHY address between 0 and 7 to each KSZ8051MNL/RNL
device.
The following table shows the MII Management frame format for the KSZ8051MNL/RNL.
Preamble
Start of
Frame
Read/Write
OP Code
PHY
Address
Bits [4:0]
REG
Address
Bits [4:0]
TA
Data
Bits [15:0]
Idle
Read
32 1’s
01
10
00AAA
RRRRR
Z0
DDDDDDDD_DDDDDDDD
Z
Write
32 1’s
01
00AAA
RRRRR
10
DDDDDDDD_DDDDDDDD
Z
Table 5. MII Management Frame Format – for KSZ8051MNL/RNL
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| KSZ8051MNLI | 功能描述:TXRX PHY 10/T100 3.3V 32QFN RoHS:是 類別:集成電路 (IC) >> 接口 - 驅(qū)動(dòng)器，接收器，收發(fā)器 系列:- 標(biāo)準(zhǔn)包裝:1,140 系列:AU 類型:收發(fā)器 驅(qū)動(dòng)器/接收器數(shù):1/1 規(guī)程:CAN 電源電壓:5.3 V ~ 27 V 安裝類型:表面貼裝 封裝/外殼:14-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:14-SO 包裝:管件 其它名稱:935267940512AU5790D14AU5790D14-ND |
| KSZ8051MNLI TR | 功能描述:以太網(wǎng) IC 3.3V, 10Base-T/100Base-TX Physical Layer Transceiver with MII support (32-QFN, Industrial Grade) RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
| KSZ8051MNLITR | 制造商:Micrel 功能描述:Ethernet TXRX PHY 10 T100 3.3V 32 QFN |
| KSZ8051MNLI-TR | 功能描述:1/1 Transceiver Full MII 32-QFN (5x5) 制造商:microchip technology 系列:- 包裝:剪切帶（CT） 零件狀態(tài):過期 類型:收發(fā)器 協(xié)議:MII 驅(qū)動(dòng)器/接收器數(shù):1/1 雙工:全 接收器滯后:- 數(shù)據(jù)速率:- 電壓 - 電源:1.8V，2.5V，3.3V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:32-VFQFN 裸露焊盤 供應(yīng)商器件封裝:32-QFN（5x5） 標(biāo)準(zhǔn)包裝:1 |
| KSZ8051MNL-TR | 功能描述:1/1 Transceiver Full MII 32-QFN (5x5) 制造商:microchip technology 系列:- 包裝:剪切帶（CT） 零件狀態(tài):過期 類型:收發(fā)器 協(xié)議:MII 驅(qū)動(dòng)器/接收器數(shù):1/1 雙工:全 接收器滯后:- 數(shù)據(jù)速率:- 電壓 - 電源:1.8V，2.5V，3.3V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:32-VFQFN 裸露焊盤 供應(yīng)商器件封裝:32-QFN（5x5） 標(biāo)準(zhǔn)包裝:1 |
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