參數(shù)資料
型號： KSZ8041FTL-S
廠商： Micrel Inc
文件頁數(shù)： 56/65頁
文件大小： 0K
描述： IC TXRX PHY 10/100 SGL 48TQFP
標準包裝： 250
系列： *
Micrel, Inc.
KSZ8041TL/FTL/MLL
December 2009
6
M9999-120909-1.2
List of Figures
Figure 1. Auto-Negotiation Flow Chart................................................................................................................................. 24
Figure 2. SMII Transmit Data/Control Segment................................................................................................................... 30
Figure 3. SMII Receive Data/Control Segment.................................................................................................................... 31
Figure 4. Typical Straight Cable Connection ....................................................................................................................... 32
Figure 5. Typical Crossover Cable Connection ................................................................................................................... 33
Figure 6. 25MHz Crystal / Oscillator Reference Clock for MII Mode ................................................................................... 35
Figure 7. 50MHz Oscillator Reference Clock for RMII Mode............................................................................................... 35
Figure 8. 125MHz Oscillator Reference Clock for SMII Mode ............................................................................................. 35
Figure 9. KSZ8041TL/FTL/MLL Power and Ground Connections....................................................................................... 36
Figure 10. KSZ8041TL/MLL and KSZ8041FTL Back-to-Back Media Converter................................................................. 38
Figure 11. MII SQE Timing (10Base-T) ............................................................................................................................... 50
Figure 12. MII Transmit Timing (10Base-T) ......................................................................................................................... 51
Figure 13. MII Receive Timing (10Base-T) .......................................................................................................................... 52
Figure 14. MII Transmit Timing (100Base-TX)..................................................................................................................... 53
Figure 15. MII Receive Timing (100Base-TX)...................................................................................................................... 54
Figure 16. RMII Timing – Data Received from RMII ............................................................................................................ 55
Figure 17. RMII Timing – Data Input to RMII ....................................................................................................................... 55
Figure 18. SMII Timing – Data Received from SMII ............................................................................................................ 56
Figure 19. SMII Timing – Data Input to SMII........................................................................................................................ 56
Figure 20. Auto-Negotiation Fast Link Pulse (FLP) Timing ................................................................................................. 57
Figure 21. MDC/MDIO Timing.............................................................................................................................................. 58
Figure 22. Reset Timing....................................................................................................................................................... 59
Figure 23. Recommended Reset Circuit.............................................................................................................................. 60
Figure 24. Recommended Reset Circuit for Interfacing with CPU/FPGA Reset Output ..................................................... 60
Figure 25. Reference Circuits for LED Strapping Pins......................................................................................................... 61
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參數(shù)描述
KSZ8041MLL 功能描述:以太網(wǎng) IC 3.3V, 10Base-T/100Base-TX Physical Layer Transceiver with MII Support - Lead Free RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray
KSZ8041MLL TR 功能描述:以太網(wǎng) IC 3.3V, 10Base-T/100Base-TX Physical Layer Transceiver with MII Support - Lead Free RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray
KSZ8041MLLI 功能描述:以太網(wǎng) IC 3.3V, 10Base-T/100Base-TX Physical Layer Transceiver with MII support (Industrial grade, Lead Free) RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray
KSZ8041MLLI TR 功能描述:以太網(wǎng) IC 3.3V, 10Base-T/100Base-TX Physical Layer Transceiver with MII support (Industrial grade, Lead Free) RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray
KSZ8041MNLU 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:10Base-T/100Base-TX Physical Layer Transceiver
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