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參數(shù)資料
| 型號(hào)： | KSZ8041FTL-S |
| 廠商： | Micrel Inc |
| 文件頁(yè)數(shù)： | 3/65頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC TXRX PHY 10/100 SGL 48TQFP |
| 標(biāo)準(zhǔn)包裝： | 250 |
| 系列： | * |
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Micrel, Inc.
KSZ8041TL/FTL/MLL
December 2009
11
M9999-120909-1.2
Pin Number
Pin Name
Type
(1)
Pin Function
23
RXD0 /
RXD[0] /
RX
DUPLEX
Ipu/O
MII Mode:
Receive Data Output[0]
(2)
/
RMII Mode:
Receive Data Output[0]
(3)
/
SMII Mode:
Receive Data and Control
(4)
/
Config. Mode:
Latched as DUPLEX (register 0h, bit 8) during power-up /
reset. See “Strapping Options” section for details.
24
GND
Gnd
Ground
25
VDDIO_3.3
P
3.3V digital VDD
26
VDDIO_3.3
P
3.3V digital VDD
27
RXDV /
CRSDV /
CONFIG2
Ipd/O
MII Mode:
Receive Data Valid Output /
RMII Mode:
Carrier Sense/Receive Data Valid Output /
Config. Mode:
The pull-up/pull-down value is latched as CONFIG2 during
power-up / reset. See “Strapping Options” section for details.
28
RXC
O
MII Mode:
Receive Clock Output.
29
RXER /
RX_ER /
ISO
Ipd/O
MII Mode:
Receive Error Output /
RMII Mode:
Receive Error Output /
Config. Mode:
The pull-up/pull-down value is latched as ISOLATE during
power-up / reset. See “Strapping Options” section for details.
30
GND
Gnd
Ground
31
VDD_1.8
P
1.8V digital VDD
32
INTRP
Opu
Interrupt Output: Programmable Interrupt Output
Register 1Bh is the Interrupt Control/Status Register for programming the
interrupt conditions and reading the interrupt status. Register 1Fh bit 9 sets the
interrupt output to active low (default) or active high.
33
TXC
I/O
MII Mode:
Transmit Clock Output
MII Back-to Back Mode:
Transmit Clock Input
34
TXEN /
TX_EN
I
MII Mode:
Transmit Enable Input /
RMII Mode:
Transmit Enable Input
35
TXD0 /
TXD[0] /
TX
I
MII Mode:
Transmit Data Input[0]
(5)
/
RMII Mode:
Transmit Data Input[0]
(6)
/
SMII Mode:
Transmit Data and Control
(7)
36
TXD1 /
TXD[1] /
SYNC
I
MII Mode:
Transmit Data Input[1]
(5)
/
RMII Mode:
Transmit Data Input[1]
(6)
/
SMII Mode:
SYNC Clock Input
37
GND
Gnd
Ground
38
TXD2
I
MII Mode:
Transmit Data Input[2]
(5)
/
39
TXD3
I
MII Mode:
Transmit Data Input[3]
(5)
/
40
COL /
CONFIG0
Ipd/O
MII Mode:
Collision Detect Output /
Config. Mode:
The pull-up/pull-down value is latched as CONFIG0 during
power-up / reset. See “Strapping Options” section for details.
41
CRS /
CONFIG1
Ipd/O
MII Mode:
Carrier Sense Output /
Config. Mode:
The pull-up/pull-down value is latched as CONFIG1 during
power-up / reset. See “Strapping Options” section for details.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| KSZ8041MLL | 功能描述:以太網(wǎng) IC 3.3V, 10Base-T/100Base-TX Physical Layer Transceiver with MII Support - Lead Free RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
| KSZ8041MLL TR | 功能描述:以太網(wǎng) IC 3.3V, 10Base-T/100Base-TX Physical Layer Transceiver with MII Support - Lead Free RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
| KSZ8041MLLI | 功能描述:以太網(wǎng) IC 3.3V, 10Base-T/100Base-TX Physical Layer Transceiver with MII support (Industrial grade, Lead Free) RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
| KSZ8041MLLI TR | 功能描述:以太網(wǎng) IC 3.3V, 10Base-T/100Base-TX Physical Layer Transceiver with MII support (Industrial grade, Lead Free) RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
| KSZ8041MNLU | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:10Base-T/100Base-TX Physical Layer Transceiver |
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