參數(shù)資料
型號(hào)： KSZ8031RNL TR
廠商： Micrel Inc
文件頁數(shù)： 22/43頁
文件大小： 0K
描述： TXRX PHY 100BASE TX 3.3V 24QFN
標(biāo)準(zhǔn)包裝： 1
類型： PHY 收發(fā)器
驅(qū)動(dòng)器/接收器數(shù)： 1/1
規(guī)程： RMII
電源電壓： 1.8V，2.5V，3.3V
安裝類型： 表面貼裝
封裝/外殼： 24-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝： 24-QFN（4x4）
包裝： 標(biāo)準(zhǔn)包裝
配用： 576-3862-ND - BOARD EVALUATION FOR KSZ8031RNL
其它名稱： 576-3843-6
Micrel, Inc.
KSZ8021RNL / KSZ8031RNL
August 2010
29
M9999-082710-1.0
Register Description (Continued)
Address
Name
Description
Mode
(1)
Default
Register 15h – RXER Counter
15.15:0
RXER Counter
Receive error counter for Symbol Error frames
RO/SC
0000h
Register 16h – Operation Mode Strap Override
16.15:11
Reserved
RW
0000_0
16.10
Reserved
RO
0
16.9:7
Reserved
RW
00_0
16.6
RMII B-to-B
override
1 = Override strap-in for RMII Back-to-Back
mode (set also bit 1 of this register to 1)
RW
0
16.5
NAND Tree
override
1 = Override strap-in for NAND Tree mode
RW
0
16.4:2
Reserved
RW
0_00
16.1
RMII override
1 = Override strap-in for RMII mode
RW
1
16.0
Reserved
RW
0
Register 17h – Operation Mode Strap Status
17.15:13
PHYAD[2:0]
strap-in status
[000] = Strap to PHY Address 0
[011] = Strap to PHY Address 3
The KSZ8021/31RNL supports only PHY
addresses 0x0h and 0x3h only.
RO
17.12:2
Reserved
RO
17.1
RMII
strap-in status
1 = Strap to RMII mode
RO
17.0
Reserved
RO
Register 18h – Expanded Control
18.15:12
Reserved
RW
0000
18.11
EDPD
Disabled
Energy Detect Power Down (EDPD) mode
1 = Disable
0 = Enable
See also register 10h, bit [4] for PLL off.
RW
1
18.10:0
Reserved
RW
000_0000_0000
Register 1Bh – Interrupt Control/Status
1b.15
Jabber
Interrupt
Enable
1 = Enable Jabber Interrupt
0 = Disable Jabber Interrupt
RW
0
1b.14
Receive Error
Interrupt
Enable
1 = Enable Receive Error Interrupt
0 = Disable Receive Error Interrupt
RW
0
1b.13
Page Received
Interrupt
Enable
1 = Enable Page Received Interrupt
0 = Disable Page Received Interrupt
RW
0
1b.12
Parallel Detect
Fault Interrupt
Enable
1 = Enable Parallel Detect Fault Interrupt
0 = Disable Parallel Detect Fault Interrupt
RW
0
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