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參數(shù)資料
| 型號： | KS9284 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | Digital Signal Processor(數(shù)字信號處理器) |
| 中文描述： | 數(shù)字信號處理器（數(shù)字信號處理器） |
| 文件頁數(shù)： | 19/25頁 |
| 文件大小： | 112K |
| 代理商： | KS9284 |
KS9284
DIGITAL SIGNAL PROCESSOR
2). Mute and Attenuation
By using a mute terminal and the ATTM signal of the CNTL-S register, audio data is muted or attenuated.
There are two kinds of mute: zero-cross muting and muting
A. zero-cross muting
The audio data is muted, after ZCMT of CNTL-Z register goes to “H”, and in case that mute is “H” and the upper 6 bits of
audio data became all “L” or “H”.
B. Muting
The audio data is muted when ZCMT of the CNTL-Z register is “L” and mute terminal is “H”.
C. Attenuation
The signal attenuation is occured by ATTM of the CNTL-Z register and mute signal as following.
Table 9.
6. DIGITAL AUDIO OUT BLOCK
The 2 channel, 16 bits data is connected and outputed serially to other digital system by the digital audio interface format.
<Digital audio interface format for CD>
1 9 1 R
0L: L-CH format included block sync preamble.
1L ~ 191L: L-CH format included L-CH sync preamble.
0R ~ 191R: R-CH format included R-CH sync preamble.
Attm
Mute
Degree of Attenuation
0
0
1
1
0
1
0
1
0dB
-
∞
dB
-12dB
-12dB
O L
O R
1 L
1 R
. . . .
1 9 0 L
1 9 0 R
1 9 1 L
1 9 1 R
O L
O R
T
1 9 2 T = 1 B L O C K
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