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參數(shù)資料
| 型號(hào)： | KS9284 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 元件分類： | 數(shù)字信號(hào)處理 |
| 英文描述： | Digital Signal Processor(數(shù)字信號(hào)處理器) |
| 中文描述： | 數(shù)字信號(hào)處理器（數(shù)字信號(hào)處理器） |
| 文件頁數(shù)： | 13/25頁 |
| 文件大?。?/td> | 112K |
| 代理商： | KS9284 |
KS9284
DIGITAL SIGNAL PROCESSOR
Fig. 6 : Tracking Counter Timing Chart
2. EFM DEMODULATION BLOCK
This block consists of EFM demodulator which demodulates EFM data obtained from a disc, EFM phase
detector and controller etc.
1)EFM phase detector
As the EFM signal inputted from a disc includes the components of 2.1609MHz, the EFM phase detector uses the bit clock
(/PBCK) of 4.3218MHz, to detect the phase of this signal.
This PBCK detects the phase at the edge of EFM signal and the result is outputted to the APDO1 or APDO2 terminals.
Fig 7. /ISTAT output signal according to CNTRL Register
N
Tracking Count Data Loading
N
N
N
N
N
N
N
MLT
CNTL-L,U
TRCNT
/ISTAT
=(/COUNT)
/ISTAT
=(/COMPLETE)
MDAT
MLT
CNTL State
/ISTAT
CNTL-L
CNTL-U
CNTL-C
Other Mode
/COMPLETE
/COUNT
/(P
W
64)
Hi-Z
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