參數(shù)資料
型號(hào)： KS8995XA
廠商： Micrel Inc
文件頁(yè)數(shù)： 31/51頁(yè)
文件大?。?/td> 0K
描述： IC SWITCH 10/100 5PORT 128PQFP
標(biāo)準(zhǔn)包裝： 66
系列： *
類型： *
應(yīng)用： *
安裝類型： 表面貼裝
封裝/外殼： 128-BFQFP
供應(yīng)商設(shè)備封裝： 128-PQFP（14x20）
包裝： 散裝
配用： 576-1604-ND - EVAL KIT EXPERIMENTAL KS8995XA
May 2005
37
M9999-051305
KS8995XA
Micrel, Inc.
Register 27 (0x1B): Port 1 Control 11
Register 43 (0x2B): Port 2 Control 11
Register 59 (0x3B): Port 3 Control 11
Register 75 (0x4B): Port 4 Control 11
Register 91 (0x5B): Port 5 Control 11
Address
Name
Description
Mode
Default
7
Receive differential
1 = If bit 6 is also ‘1’ this will enable receive rate control
R/W
0
priority rate control
for this port on low priority packets at the low priority
rate. If bit 5 is also ‘1’, this will enable receive rate
control on high priority packets at the high priority rate.
0 = receive rate control will be based on the low priority
rate for all packets on this port.
6
Low priority receive
1 = enable port’s low priority receive rate control feature.
R/W
0
rate control enable
0 = disable port’s low priority receive rate control.
5
High priority receive
1 = if bit 7 is also ‘1’ this will enable the port’s high
R/W
0
rate control enable
priority receive rate control feature. If bit 7 is a ‘0’ and
bit 6 is a ‘1’, all receive packets on this port will be rate
controlled at the low priority rate.
0 = disable port’s high priority receive rate control feature.
4
Low priority receive rate
1 = flow control may be asserted if the port’s low priority
R/W
0
flow control enable
receive rate is exceeded.
0 = flow control is not asserted if the port’s low priority
receive rate is exceeded.
3
High priority receive
1 = flow control may be asserted if the port’s high
R/W
0
rate flow control enable
priority receive rate is exceeded. To use this, differential
receive rate control must be on.
0 = flow control is not asserted if the port’s high
priority receive rate is exceeded.
2
Transmit differential
1 = transmit rate control on both high and low
R/W
0
priority rate control
priority packets based on the rate counters defined by
the high and low priority packets respectively.
0 = transmit rate control on any packets.
The rate counters defined in low priority will be used.
1
Low priority transmit
1 = enable the port’s low priority transmit rate control
R/W
0
rate control enable
feature.
0 = disable the port’s low priority transmit rate control
feature.
0
High priority transmit
1 = enable the port’s high priority transmit rate control
R/W
0
rate control enable
feature.
0 = disable the port’s high priority transmit rate control
feature.
Register 28 (0x1C): Port 1 Control 12
Register 44 (0x2C): Port 2 Control 12
Register 60 (0x3C): Port 3 Control 12
Register 76 (0x4C): Port 4 Control 12
Register 92 (0x5C): Port 5 Control 12
Note:
Port Control 12 and 13, and Port Status 0 contents can be accessed by MIIM (MDC/MDIO) interface via the standard MIIM register definition.
Address
Name
Description
Mode
Default
7
Disable auto-negotiation
1 = disable auto-negotiation, speed and duplex are
R/W
0
decided by bit 6 and 5 of the same register.
0 = auto-negotiation is on.
6
Forced speed
1 = forced 100BT if AN is disabled (bit 7).
R/W
1
0 = forced 10BT if AN is disabled (bit 7).
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