Micrel May 2005 – SPECIFICATIONS SUBJECT TO CHANGE WITHOUT NOTICE KS8001 MICREL CONFIDENTIAL. DO NOT DISTRIBUTE. 6 Pin" />
參數(shù)資料
型號: KS8001LI
廠商: Micrel Inc
文件頁數(shù): 41/44頁
文件大?。?/td> 0K
描述: TXRX 10/100 LINKMD 3.3V 48-LQFP
標(biāo)準(zhǔn)包裝: 250
類型: 收發(fā)器
驅(qū)動(dòng)器/接收器數(shù): 1/1
規(guī)程: MII,RMII,SMII
電源電壓: 3.14 V ~ 3.47 V
安裝類型: 表面貼裝
封裝/外殼: 48-LQFP
供應(yīng)商設(shè)備封裝: 48-LQFP(7x7)
包裝: 管件
配用: KS8001L-EVAL-ND - EVAL KIT EXPERIMENTAL KS8001L
KS8001
Micrel
May 2005 – SPECIFICATIONS SUBJECT TO CHANGE WITHOUT NOTICE
KS8001
MICREL CONFIDENTIAL. DO NOT DISTRIBUTE.
6
Pin Description
Pin Number
Pin Name
Type
(Note 1)
Pin Function
1
MDIO
I/O
Management Interface (MII) Data I/O
This pin requires an external 10K pull-up resistor.
2
MDC
I
Management Interface (MII) Clock Input
This pin is synchronous to the MDIO data interface
3
RXD3/
PHYAD1
Ipd/O
MII Mode: Receive Data Output[3]
2 /
Configuration Mode: The pull-up/pull-down value is latched as PHYADDR[1]
during reset. See “Strapping Options” section for details.
4
RXD2/
PHYAD2
Ipd/O
MII Mode: MII Receive Data Output[2]
2 /
Configuration Mode: The pull-up/pull-down value is latched as PHYADDR[2]
during reset. See “Strapping Options” section for details.
5
RXD1/
RXD[1]/
PHYAD3
Ipd/O
MII Mode: Receive Data Output[1]
2 /
RMII Mode: Receive Data Output[1]
3 /
Configuration Mode: The pull-up/pull-down value is latched as PHYADDR[3]
during reset. See “Strapping Options” section for details.
6
RXD0/
RXD[0]/
RX
PHYAD4
Ipd/O
MII Mode: Receive Data Output[0]
2 /
RMII Mode: Receive Data Output[0]
3 /
SMII Mode: Receive Data and Control
4 /
Configuration Mode: The pull-up/pull-down value is latched as PHYADDR[4]
during reset. See “Strapping Options” section for details.
7
VDDIO
Pwr
Digital IO 2.5 /3.3V tolerance power supply.
8
GND
Gnd
Ground
9
RXDV/
CRSDV/
PCS_LPBK
Ipd/O
MII Mode: Receive Data Valid Output /
RMII Mode: Carrier Sense/Receive Data Valid /
Configuration Mode: The pull-up/pull-down value is latched as pcs_lpbk
during reset. See “Strapping Options” section for details.
10
RXC/
SMII_SELECT
Ipd/O
MII Receive Clock Output
Operating at:
25 MHz = 100 Mbps
2.5 MHz = 10 Mbps
Configuration Mode: The pull-up/pull-down value is latched as SMII during
reset. See “Strapping Options” section for details.
11
RXER/
RX_ER/
ISO
Ipd/O
MII Mode: Receive Error Output /
RMII Mode: Receive Error /
Configuration Mode: The pull-up/pull-down value is latched as ISOLATE
during reset. See “Strapping Options” section for details.
12
GND
Gnd
Ground
13
VDDC
Pwr
Digital core 1.8 V only power supply
14
TXER
Ipd
MII Transmit Error Input
15
TXC/
REFCLK/
CLOCK
I/O
MII Mode: MII Transmit Clock Output /
RMII Mode: 50 MHz Reference Clock Input /
SMII Mode: 125 MHz Synchronization Clock Input
16
TXEN
Ipd
MII Transmit Enable Input
17
TXD0/
TXD[0]/
TX
Ipd
MII Mode: Transmit Data Input[0] /
RMII Mode: Transmit Data Input[0] /
SMII Mode: Transmit Data and Control
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