參數(shù)資料
型號(hào)： KS57C01504
廠商： SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述： The KS57C01502/C01504 single-chip CMOS microcontroller has been designed for high-performance using Samsungs newest 4-bit CPU core, SAM47 (Samsung Arr
中文描述： 在KS57C01502/C01504單芯片CMOS微控制器是專門為高性能三星則采用最新的4位CPU核心，SAM47（三星到達(dá)
文件頁(yè)數(shù)： 5/36頁(yè)
文件大?。?/td> 308K
代理商： KS57C01504
KS57C01502/C01504/P01504
PRODUCT OVERVIEW
1-5
CONTROL REGISTERS
Program Status Word
The 8-bit program status word (PSW) controls ALU operations and instruction execution sequencing. It is also
used to restore a program's execution environment when an interrupt has been serviced. Program instructions can
always address the PSW regardless of the current value of data memory enable flags.
Before an interrupt or subroutine is processed, the PSW values are pushed onto the stack in data memory bank 0.
When the service routine is completed, the PSW values are restored.
IS1
C
IS0
SC2
EMB
SC1
ERB
SC0
Interrupt status flags (IS1, IS0), the enable memory bank and enable register bank flags (EMB, ERB), and the
carry flag (C) are 1- and 4-bit read/write or 8-bit read-only addressable. You can address the skip condition flags
(SC0–SC2) using 8-bit read instructions only.
Select Bank (SB) Register
Two 4-bit registers store address values used to access specific memory and register banks: the select memory
bank register, SMB, and the select register bank register, SRB.
'SMB n' instruction selects a data memory bank (0 or 15) and stores the upper four bits of the 12-bit data memory
address in the SMB register. To select register bank 0, 1, 2, or 3, and store the address data in the SRB, you can
use the instruction 'SRB n'.
The instructions "PUSH SB" and "POP SB" move SRB and SMB values to and from the stack for interrupts and
subroutines.
CLOCK CIRCUITS
System oscillation circuit generates the internal clock signals for the CPU and peripheral hardware.
The system clock can use a crystal, or ceramic oscillation source, or an externally-generated clock signal. To drive
KS57C01502/C01504 using an external clock source, the external clock signal should be input to X
in
, and its
inverted signal to X
out
.
4-bit power control register controls the oscillation on/off, and select the CPU clock. The internal system clock
signal (fx) can be divided internally to produce three CPU clock frequencies — fx/4, fx/8, or fx/64.
INTERRUPTS
Interrupt requests may be generated internally by on-chip processes (INTB, INTT0, and INTS) or externally by
peripheral devices (INT0 and INT1). There are two quasi-interrupts: INTK and INTW. INTK (KS0–KS2) detects
falling edges of incoming signals and INTW detects time intervals of 0.5 seconds or 3.91 milliseconds. The
following components support interrupt processing:
— Interrupt enable flags
— Interrupt request flags
— Interrupt priority registers
— Power-down termination circuit
相關(guān)PDF資料
PDF描述
KS57C0301 4-BIT CMOS Microcontroller(4位微控制器)
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KS57C21116 4-BIT CMOS Microcontroller(4位微控制器)
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
KS57C0301 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:The KS57C0301/0302 single-chip CMOS microcontroller has been designed for high performance using Samsungs newest 4-bit CPU core.
KS57C0302 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:The KS57C0301/0302 single-chip CMOS microcontroller has been designed for high performance using Samsungs newest 4-bit CPU core.
KS57C0404 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:The KS57C0404/C0408 single-chip CMOS microcontroller has been designed for very high-performance using Samsungs newest 4-bit CPU core, SAM47 (Samsung
KS57C0408 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:The KS57C0404/C0408 single-chip CMOS microcontroller has been designed for very high-performance using Samsungs newest 4-bit CPU core, SAM47 (Samsung
KS57C0502 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:MICROCONTROLLER
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