參數(shù)資料
型號: KS57C2016
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 4-BIT CMOS Microcontroller(4位微控制器)
中文描述: 4位CMOS微控制器(4位微控制器)
文件頁數(shù): 1/6頁
文件大?。?/td> 47K
代理商: KS57C2016
G
S MSUN
KS57C2016
4-BIT CMOS Microcontroller
Product Specification
5–1
OVERVIEW
The KS57C2016 single-chip CMOS microcontroller is designed for very high performance using Samsung's
newest 4-bit CPU core. With an up-to-20-digit LCD direct drive capability and up to 40 pins for LCD segment data
output, a versatile 16-bit timer/counter with pulse width modulation and data capture functions, and its large ROM
size, the "2016" offers you an excellent design solution for a wide variety of LCD applications.
Up to 56 pins of the 100-pin QFP package can be dedicated to I/O. Eight vectored interrupts provide fast
response to internal and external events. In addition, the 2016's advanced CMOS technology ensures low power
consumption and a wide operating voltage range.
FEATURES
Memory
512
×
4-bit RAM
16,384
×
8-bit ROM
56 I/O Pins
I/O: 40 pins (8 n-channel
open-drain pins)
Input only: 4 pins
Output only: 12 pins
LCD Controller/Driver
Maximum 20-digit LCD direct
drive capability
28, 32, 36, and 40 segment
outputs selectable
Display modes: Static, 1/2
duty (1/2 bias)
1/3 duty (1/2 or 1/3 bias), 1/4
duty (1/3 bias)
8-Bit Basic Timer
4 interval timer functions
8-Bit Timer/Counter
Programmable 8-bit timer
External event counter
Arbitrary clock output
External clock signal divider
Serial I/O interface clock
generator
16-Bit Timer/Counter
Programmable 16-bit timer
External event counter
Arbitrary clock output
External clock signal divider
Capture function
16-bit PWM output function
Watch Timer
Time interval generation:
0.5s, 3.9 ms at 32768 Hz
4 frequency outputs (BUZ)
Clock generation for LCD
8-Bit Serial I/O Interface
8-bit transmit/receive mode
8-bit receive mode
LSB-first or MSB-first
transmission selectable
Internal/external clock source
Interrupts
5 internal vectored interrupts
3 external vectored interrupts
2 quasi-interrupts
Bit Sequential Carrier
Supports 16-bit serial data
transfer in arbitrary format
Memory-Mapped I/O Structure
Data memory bank 15
Two Power-Down Modes
Idle (only CPU clock stops)
Stop (system clock stops)
Oscillation Sources
Crystal, ceramic, or RC for
main system clock
Crystal for subsystem clock
Main system clock frequency:
4.19 MHz (typical)
Subsystem clock frequency:
32.768 kHz
CPU clock divider circuit
(by 4, 8, or 64)
Instruction Execution Times
0.95, 1.91, 15.3
μ
s at 4.19
MHz
122
μ
s at 32.768 kHz
Operating Temperature
– 40
°
C to 85
°
C
Operating Voltage Range
2.7 V to 6.0 V
Package Type
100-pin QFP
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