參數(shù)資料
型號: KS0165
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: Multimedia Audio(波表合成芯片)
中文描述: 多媒體音響(波表合成芯片)
文件頁數(shù): 7/20頁
文件大?。?/td> 83K
代理商: KS0165
KS0165
MULTIMEDIA AUDIO
7/
20
Pin Name
Pin #
Type
Description
MEMORY INTERFACE
MA[22:1]
29 - 38
41 - 52
O
Memory Address Bus Bits [22:1]. This is the external memory address bus.
When accessing static memory devices (ROM/SRAM), these pins will
contain a stable address throughout the entire memory cycle. When
accessing dynamic memory, pins MA[11:0] will contain the multiplexed
DRAM address.
Memory Data Bus Bit [15:0]. This is the external memory data bus.
Memory Upper Byte Write Enable. When this signal is low during an
external memory access, it indicates that data bits MD[15:8] should be
written to the addressed memory device.
Memory Lower Byte Write Enable. When this signal is low during an
external memory access, it indicates that data bits MD[7:0] should be
written to the addressed memory device.
Dynamic Memory Row Address Strobe. This signal is the Row Address
Strobe for all external DRAM. When a DRAM device is addressed, this
signal will be driven low shortly after the row address has been placed on
MA0-11. It will also be driven low during ROM/SRAM cycles to provide
CAS-before-RAS refresh for any DRAM devices in the system.
Dynamic Memory Column Address Strobes/Static Memory Chip Selects
[2:0]. When a DRAM device is addressed, one of these signals will be
driven low shortly after the column address has been placed on MA[11:0].
It will also be driven low during ROM/SRAM cycles to provide CAS-before-
RAS refresh for any DRAM devices in the system. When a ROM or SRAM
device is addressed, one of these signals will be driven low shortly after the
address has been placed on MA[22:0].
Memory Type Select. When this pin is tied to GND, the optional memory
device(s) connected to CAS1 and/or CAS2 are configured as static(ROM or
SRAM) devices. When this pin is pulled up to V
DD
, the optional memory
device(s) connected to CAS1 and/or CAS2 are configured as dynamic
(DRAM) devices.
Dynamic Memory Size Select. When optional dynamic memory is
connected to CAS1 and/or CAS2, these pins configure the size of the
DRAM devices so that proper address multiplexing can be performed by
the KS0164. The size is configured as follows:
MD[15:0]
WE1
53 - 70
27
I/O
O
WE0
28
O
RAS
26
O
CAS2-0
23 - 25
O
MTYPE
78
I
MSIZE[1:0]
79,80
I
MSIZE1 MSIZE0 DRAM Size
0 0 64K
0 1 256K
1 0 1M
1 1 4M
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