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參數(shù)資料
| 型號： | KS0165 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | Multimedia Audio(波表合成芯片) |
| 中文描述： | 多媒體音響（波表合成芯片） |
| 文件頁數(shù)： | 6/20頁 |
| 文件大?。?/td> | 83K |
| 代理商： | KS0165 |
KS0165
MULTIMEDIA AUDIO
6/
20
PIN DESCRIPTION
Pin Name
Pin #
Type
Description
HOST PC INTERFACE
HA[9:0]
1 - 2,
93 - 100
I
Host Address Bits 9-0. These are the low 10 bits of the Host PC
address bus, which are decoded to control access the MPU-401. For
IBM PC application, these pins should be connected directly to A[9-0].
Alternatively, these pins may be tied to GND, and a fully qualified chip
select signal may be connected to the CSL* pin instead.
Host Address Enable. This is the Host PC I/O enable. All I/O
operations are ignored any time this signal is high. For PC applications,
these pins should be connected directly to AEN*.
Chip Select. In most applications where the MPU-401 emulation is
being used, the KS0164 address decoder will be used. However, if a
non-standard address decode is required, or of a plug-n-play address
decode is available, a fully qualified, active-low chip select signal may
be connected to this pin instead. If this pin is not used, it must be
pulled up to V
DD
.
Buffered Host PC Data Bus Bits [0:7]. These pins have 18mA drivers,
so they may be directly connected to the host PC data bus in most
applications. If additional buffering is desired a 74LS245 may be used
with its Enable pin connected to HDBEN*, and its DIR pin connected to
HIOR*.
HAENL
16
I
CSL
83
I
HD[7:0]
4 - 11
I/O
HIORL
17
I
Host I/O Read. This is the Host PC I/O read enable.
HIOWL
18
I
Host I/O Write. This is the Host PC I/O write strobe. Data is written to
internal registers on the rising edge of this signal.
Host PC Reset. The active polarity of this pin is programmable via the
HRSTPOL pin. For PC application, this pin should be connected
directly to the PC-bus RSTDRV signal. For daughter card applications,
connect this pin to the reset signal from the host board.
Determines the signal polarity of the HRST pin. Set this pin low to
make HRST active low (typical for daughter card applications), set this
pin high to make HRST active high (use for ISA bus applications).
Host PC Data Bus Buffer Enable. This output controls the enable to
the 74LS245 which buffers the Host PC data bus. This pin is driven
low any time the MPU-401 is addressed for an I/O access.
Host MPU-401 Interrupt. This is an active high interrupt output to the
Host PC. It should be connected to one of the Host IRQ lines,
normally IRQ2.
HRST
81
I
HRSTPOL
82
I
HDBENL
3
O
HINT
88
O
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