參數(shù)資料
型號： KMPC875CZT133
廠商： Freescale Semiconductor
文件頁數(shù)： 7/84頁
文件大?。?/td> 0K
描述： IC MPU POWERQUICC 133MHZ 256PBGA
標準包裝： 2
系列： MPC8xx
處理器類型： 32-位 MPC8xx PowerQUICC
速度： 133MHz
電壓： 3.3V
安裝類型： 表面貼裝
封裝/外殼： 256-BGA
供應商設備封裝： 256-PBGA（23x23）
包裝： 托盤
MPC875/MPC870 PowerQUICC Hardware Specifications, Rev. 4
Freescale Semiconductor
15
Mandatory Reset Configurations
One consequence of multiple power supplies is that when power is initially applied, the voltage rails ramp
up at different rates. The rates depend on the nature of the power supply, the type of load on each power
supply, and the manner in which different voltages are derived. The following restrictions apply:
VDDL must not exceed VDDH during power up and power down
VDDL must not exceed 1.9 V, and VDDH must not exceed 3.465 V
These cautions are necessary for the long-term reliability of the part. If they are violated, the electrostatic
discharge (ESD) protection diodes are forward-biased, and excessive current can flow through these
diodes. If the system power supply design does not control the voltage sequencing, the circuit shown in
Figure 4 can be added to meet these requirements. The MUR420 Schottky diodes control the maximum
potential difference between the external bus and core power supplies on power up, and the 1N5820 diodes
regulate the maximum potential difference on power down.
Figure 4. Example Voltage Sequencing Circuit
9
Mandatory Reset Configurations
The MPC875/MPC870 requires a mandatory configuration during reset.
If hardware reset configuration word (HRCW) is enabled, the HRCW[DBGC] value needs to be set to
binary X1 in the HRCW and the SIUMCR[DBGC] should be programmed with the same value in the boot
code after reset. This can be done by asserting the RSTCONF during HRESET assertion.
If HRCW is disabled, the SIUMCR[DBGC] should be programmed with binary X1 in the boot code after
reset by negating the RSTCONF during the HRESET assertion.
The MBMR[GPLB4DIS], PAPAR, PADIR, PBPAR, PBDIR, PCPAR, and PCDIR need to be configured
with the mandatory values in Table 7 in the boot code after the reset is negated.
Table 7. Mandatory Reset Configuration of MPC875/MPC870
Register/Configuration
Field
Value
(Binary)
HRCW (Hardware reset configuration word)
HRCW[DBGC]
X1
SIUMCR (SIU module configuration register)
SIUMCR[DBGC]
X1
MBMR (Machine B mode register)
MBMR[GPLB4DIS}
0
PAPAR (Port A pin assignment register)
PAPAR[5:9]
PAPAR[12:13]
0
VDDH
VDDL
1N5820
MUR420
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KMPC875CVR66 IC MPU POWERQUICC 66MHZ 256PBGA
相關代理商/技術參數(shù)
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KMPC875CZT66 功能描述:微處理器 - MPU PQ I HIP6W DUET RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-324
KMPC875VR133 功能描述:微處理器 - MPU PQ I HIP6W DUET RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-324
KMPC875VR66 功能描述:微處理器 - MPU PQ I HIP6W DUET RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-324
KMPC875VR80 功能描述:微處理器 - MPU PQ I HIP6W DUET RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-324
KMPC875ZT133 功能描述:微處理器 - MPU PQ I HIP6W DUET RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-324
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