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參數(shù)資料
| 型號(hào)： | KMPC8560CPX667JB |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 10/36頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MPU POWERQUICC III 783-FCPBGA |
| 標(biāo)準(zhǔn)包裝： | 2 |
| 系列： | MPC85xx |
| 處理器類型： | 32-位 MPC85xx PowerQUICC III |
| 速度： | 667MHz |
| 電壓： | 1.2V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 784-BBGA，F(xiàn)CBGA |
| 供應(yīng)商設(shè)備封裝： | 783-FCPBGA（29x29） |
| 包裝： | 托盤 |
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18
MPC8560 PowerQUICC III
MOTOROLA
Integrated Communications Processor Product Brief
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
Power Management
The RapidIO unit on the MPC8560 supports the I/O and message-passing logical specifications, the
common transport specification, and the 8/16 LP-LVDS physical layer specification of the RapidIO
Interconnect Specification. It does not support the globally shared memory logical specification.
Highlights of the implementation include: support for four priority levels and ordering within a priority
level, CRC error management, 32- to 256-byte transactions and 8-bit data width ports.
The physical layer of the RapidIO unit can operate at up to 500 MHz. Because the interface is defined as a
source-synchronous, double-data-rate, LVDS-signaling interconnect, the theoretical unidirectional peak
bandwidth is 8 Gbps. Receive and transmit ports operate independently, resulting in an aggregate theoretical
bandwidth of 16 Gbps.
3.13.1 RapidIO Message Unit
The MPC8560’s RapidIO messaging supports one inbox/outbox structure for data and one doorbell
structure for messages. Both chaining and direct modes are provided for the outbox, and messages can hold
up to 16 packets of 256 bytes, or a total of 4 Kbytes.
3.14 Power Management
In addition to low-voltage operation and dynamic power management in its execution units, the MPC8560
supports four power consumption modes: full-on, doze, nap, and sleep. The three low-power modes: doze,
nap, and sleep, can be entered under software control in the e500 core or by external masters accessing a
configuration register.
Doze mode suspends execution of instructions in the e500 core. The core is left in a standby mode in which
cache snooping and time base interrupts are still enabled. Device logic external to the processor core is fully
functional in this mode.
Nap mode shuts down clocks to all the e500 functional units except the time base, which can be disabled
separately. No snooping is performed in nap mode, but the device logic external to the processor core is fully
functional.
Sleep mode shuts down not only the e500 core, but all of the MPC8560 I/O interfaces as well. Only the
interrupt controller and power management logic remain enabled so that the device can be awakened.
3.15 Clocking
The MPC8560 takes in the PCI_CLK/SYSCLK signal as an input to the device PLL and multiplies it by an
integer from 1 to 16 to generate the core complex bus clock (the platform clock), which operates at the same
frequency as the DDR DRAM data rate (for example, 266 or 333 MHz). The L2 cache also operates at this
frequency. The e500 core uses the CCB clock as an input to its PLL, which multiplies it again by 2, 2.5, 3,
or 3.5 to generate the core clock.
DLLs are used in the DDR SDRAM controller and the local bus memory controller (LBC) to generate
memory clocks. Six differential clock pairs are generated for DDR SDRAMs. Two clock outputs are
generated for the LBC.
The RapidIO transmit clock may be sourced from one of three locations: the platform clock, the RapidIO
receive clock, or a special differential clock input. This input is designed to receive inputs from an external
clock synthesis device driving a clock with a frequency of up to 500 MHz.
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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| KMPC8560CVT667JB | 功能描述:微處理器 - MPU PQ 3 8560-DRACOM RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324 |
| KMPC8560PX667JB | 功能描述:電源管理IC開發(fā)工具 32-BIT CMOS 667MHz RoHS:否 制造商:Maxim Integrated 產(chǎn)品:Evaluation Kits 類型:Battery Management 工具用于評估:MAX17710GB 輸入電壓: 輸出電壓:1.8 V |
| KMPC8560PX667LB | 功能描述:微處理器 - MPU PQ 3 8560-DRACOM RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324 |
| KMPC8560PX667LC | 功能描述:微處理器 - MPU PQ 3 8560-DRACOM RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324 |
| KMPC8560PX833LB | 功能描述:微處理器 - MPU PQ 3 8560-DRACOM RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324 |
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