- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄373162 > KM68V4002B (SAMSUNG SEMICONDUCTOR CO. LTD.) 512Kx8 Bit High Speed Static RAM(3.3V Operating)(512K x8位高速CMOS 靜態(tài) RAM) PDF資料下載
參數(shù)資料
| 型號： | KM68V4002B |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 512Kx8 Bit High Speed Static RAM(3.3V Operating)(512K x8位高速CMOS 靜態(tài) RAM) |
| 中文描述： | 512Kx8位高速靜態(tài)RAM（3.3V的工作）（為512k x8位高速的CMOS靜態(tài)RAM）的 |
| 文件頁數(shù)： | 7/9頁 |
| 文件大小： | 137K |
| 代理商： | KM68V4002B |
KM68V4002B/BL, KM68V4002BI/BLI
CMOS SRAM
PRELIMINARY
Rev 2.1
June 1998
- 7 -
NOTES
(WRITE CYCLE)
1. All write cycle timing is referenced from the last valid address to the first transition address.
2. A write occurs during the overlap of a low CS and WE. A write begins at the latest transition CS going low and WE going low ;
A write ends at the earliest transition CS going high or WE going high. t
WP
is measured from the beginning of write to the end of
write.
3. t
CW
is measured from the later of CS going low to end of write.
4. t
AS
is measured from the address valid to the beginning of write.
5. t
WR
is measured from the end of write to the address change. t
WR
applied in case a write ends as CS or WE going high.
6. If OE, CS and WE are in the Read Mode during this period, the I/O pins are in the output low-Z state. Inputs of opposite phase
of the output must not be applied because bus contention can occur.
7. For common I/O applications, minimization or elimination of bus contention conditions is necessary during read and write cycle.
8. If CS goes low simultaneously with WE going or after WE going low, the outputs remain high impedance state.
9. Dout is the read data of the new address.
10. When CS is low : I/O pins are in the output state. The input signals in the opposite phase leading to the output should not be
applied.
TIMING WAVEFORM OF WRITE CYCLE(2)
(OE=Low Fixed)
Address
CS
t
WP1(2)
t
DW
t
DH
t
OW
t
WHZ(6)
Valid Data
WE
Data in
Data out
t
WC
t
AS(4)
t
WR(5)
t
AW
t
CW(3)
(10)
(9)
High-Z(8)
High-Z
TIMING WAVEFORM OF WRITE CYCLE(3)
(CS
=
Controlled)
Address
CS
t
AW
t
DW
t
DH
Valid Data
WE
Data in
Data out
High-Z
High-Z(8)
t
CW(3)
t
WP(2)
t
AS(4)
t
WC
t
WR(5)
High-Z
High-Z
t
LZ
t
WHZ(6)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| KM68V4002BI | 512Kx8 Bit High Speed Static RAM(3.3V Operating)(512K x8位高速CMOS 靜態(tài) RAM) |
| KM718FV4011 | 256Kx18 Synchronous SRAM(256Kx18位同步靜態(tài) RAM) |
| KM736FV4011 | 128Kx36 Synchronous SRAM(128Kx36位同步靜態(tài) RAM) |
| KM718FV4021 | 256Kx18 Synchronous SRAM(256Kx18位同步靜態(tài) RAM) |
| KM736FV4021 | 128Kx36 Synchronous SRAM(128Kx36位同步靜態(tài) RAM) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| KM-6LP | 制造商:Cooper Bussmann 功能描述:LOW PROFILE MINI ASSORTME - Bulk 制造商:COOPER INDUSTRIES 功能描述:LOW PROFILE MINI ASSORTME 制造商:COOPER BUSSMANN 功能描述:LOW PROFILE MINI ASSORTME |
| KM6TMS9929 | 制造商:Texas Instruments 功能描述: |
| KM7000KIT | 制造商:COMARK 功能描述:PH METER R |
| KM703N | 制造商:FRONTIER 制造商全稱:Frontier Electronics. 功能描述:10mm Adjustable Unshielded IFT Coils |
| KM703N-LFR | 制造商:FRONTIER 制造商全稱:Frontier Electronics. 功能描述:10mm Adjustable Unshielded IFT Coils |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。