參數(shù)資料
型號(hào): KM68V4000A
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 512K x8 bit Low Power and Low Voltage CMOS Static RAM(512K x8位低功耗低電壓CMOS 靜態(tài) RAM)
中文描述: 為512k x8位低功耗和低電壓的CMOS靜態(tài)RAM(為512k x8位低功耗低電壓的CMOS靜態(tài)RAM)的
文件頁(yè)數(shù): 5/9頁(yè)
文件大小: 140K
代理商: KM68V4000A
KM68V4000A, KM68U4000A Family
CMOS SRAM
Revision 2.0
February 1998
5
AC CHARACTERISTICS
(KM68V4000A Family : Vcc=3.0~3.3V, KM68U4000A Family : Vcc=2.7~3.3V
Commercial Product : T
A
=0 to 70
°
C, Industrial Product : T
A
=-40 to 85
°
C)
Parameter List
Symbol
Speed Bins
Units
85ns
100ns
Min
Max
Min
Max
Read
Read cycle time
t
RC
85
-
100
-
ns
Address access time
t
AA
-
85
-
100
ns
Chip select to output
t
CO
-
85
-
100
ns
Output enable to valid output
t
OE
-
40
-
50
ns
Chip select to low-Z output
t
LZ
10
-
10
-
ns
Output enable to low-Z output
t
OLZ
5
-
5
-
ns
Chip disable to high-Z output
t
HZ
0
25
0
30
ns
Output disable to high-Z output
t
OHZ
0
25
0
30
ns
Output hold from address change
t
OH
10
-
15
-
ns
Write
Write cycle time
t
WC
85
-
100
-
ns
Chip select to end of write
t
CW
70
-
80
-
ns
Address set-up time
t
AS
0
-
0
-
ns
Address valid to end of write
t
AW
70
-
80
-
ns
Write pulse width
t
WP
55
-
70
-
ns
Write recovery time
t
WR
0
-
0
-
ns
Write to output high-Z
t
WHZ
0
20
0
30
ns
Data to write time overlap
t
DW
35
-
40
-
ns
Data hold from write time
t
DH
0
-
0
-
ns
End write to output low-Z
t
OW
5
-
5
-
ns
C
L
1)
1. Including scope and jig capacitance
AC OPERATING CONDITIONS
TEST CONDITIONS
( Test Load and Input/Output Reference)
Input pulse level : 0.4 to 2.2V
Input rising and faling time : 5ns
Input and output reference voltage :1.5V
Outpuy load(see right) : C
L
=100pF+1TTL
C
L
2)
=30pF+1TTL
1. KM68V4000A-8 Family, KM68U4000A-8 Family
DATA RETENTION CHARACTERISTICS
Item
Symbol
Test Condition
Min
Typ
Max
Unit
Vcc for data retention
V
DR
CS
Vcc-0.2V
2.0
-
3.6
V
Data retention current
I
DR
Vcc=3.0V, CS
Vcc-0.2V
KM68V4000AL
KM68V4000AL-L
KM68V4000ALI
KM68V4000ALI-L
KM68U4000AL
KM68V4000AL-L
KM68U4000ALI
KM68V4000ALI-L
-
-
-
-
-
-
-
-
0
1
0.5
-
-
1
0.5
-
-
-
30
15
30
20
30
10
30
15
-
μ
A
Data retention set-up time
t
SDR
See data retention waveform
ms
Recovery time
t
RDR
5
-
-
相關(guān)PDF資料
PDF描述
KM68U4000B 512K x8 bit Low Power and Low Voltage CMOS Static RAM(512K x8位低功耗低電壓CMOS 靜態(tài) RAM)
KM68V4000B 512K x8 bit Low Power and Low Voltage CMOS Static RAM(512K x8位低功耗低電壓CMOS 靜態(tài) RAM)
KM68U4000C 512K x8 bit Low Power and Low Voltage CMOS Static RAM(512K x8位低功耗低電壓CMOS 靜態(tài) RAM)
KM68V4000C 512K x8 bit Low Power and Low Voltage CMOS Static RAM(512K x8位低功耗低電壓CMOS 靜態(tài) RAM)
KM68U512A 64Kx8 bit Low Power and Low Voltage CMOS Static RAM(64K x8位高速CMOS 靜態(tài) RAM)
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