參數(shù)資料
型號(hào)： KM48C8104B
廠商： SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述： 8M x 8bit CMOS Dynamic RAM with Extended Data Out(8M x 8位CMOS 動(dòng)態(tài)RAM(帶擴(kuò)展數(shù)據(jù)輸出))
中文描述： 8米× 8位的擴(kuò)展數(shù)據(jù)輸出的CMOS動(dòng)態(tài)RAM（8米× 8位的CMOS動(dòng)態(tài)隨機(jī)存儲(chǔ)器（帶擴(kuò)展數(shù)據(jù)輸出））
文件頁(yè)數(shù)： 1/21頁(yè)
文件大?。?/td> 366K
代理商： KM48C8104B
KM48C8004B,
KM48C8104B
CMOS DRAM
This is a family of 8,388,608 x 8 bit Extended Data Out Mode CMOS DRAMs. Extended Data Out Mode offers high speed random
access of memory cells within the same row. Refresh cycle(4K Ref. or 8K Ref.), access time (-45, -5 or -6), package type (SOJ or TSOP-
II) are optional features of this family. All of this family have CAS-before-RAS refresh, RAS-only refresh and Hidden refresh capabilities.
This 8Mx8 EDO Mode DRAM family is fabricated using Samsung
′
s advanced CMOS process to realize high band-width, low power con-
sumption and high reliability.
Part Identification
- KM48C8004B(5.0V, 8K Ref.)
- KM48C8104B(5.0V, 4K Ref.)
Extended Data Out Mode operation
CAS-before-RAS refresh capability
RAS-only and Hidden refresh capability
Fast parallel test mode capability
TTL(5.0V) compatible inputs and outputs
Early Write or output enable controlled write
JEDEC Standard pinout
Available in Plastic SOJ and TSOP(II) packages
+5.0V
±
10% power supply
Control
Clocks
RAS
CAS
W
Vcc
Vss
A0~A12
(A0~A11)*1
A0~A9
(A0~A10)*1
Memory Array
8,388,608 x 8
Cells
SAMSUNG ELECTRONICS CO., LTD.
reserves the right to
change products and specifications without notice.
8M x 8bit CMOS Dynamic RAM with Extended Data Out
DESCRIPTION
FEATURES
FUNCTIONAL BLOCK DIAGRAM
Note) *1 : 4K Refresh
Refresh Cycles
Part
NO.
Refresh
cycle
Refresh time
Normal
64ms
KM48C8004B*
KM48C8104B
8K
4K
Unit : mW
S
DQ0
to
DQ7
Data out
Buffer
Data in
Buffer
Performance Range
Speed
-45
-5
-6
t
RAC
45ns
50ns
60ns
t
CAC
12ns
13ns
15ns
t
RC
74ns
84ns
104ns
t
HPC
17ns
20ns
25ns
Active Power Dissipation
Speed
-45
-5
-6
8K
550
495
440
4K
715
660
605
*
Access mode & RAS only refresh mode
: 8K cycle/64ms
CAS-before-RAS & Hidden refresh mode
: 4K cycle/64ms
Row Decoder
Column Decoder
VBB Generator
Refresh Timer
Refresh Control
Refresh Counter
Row Address Buffer
Col. Address Buffer
OE
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