參數(shù)資料
型號: KM4212IM8TR3
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: 運動控制電子
英文描述: Dual, 70A, Low Cost, +2.7V & +5V, 7.3MHz Rail-to-Rail Amp
中文描述: DUAL OP-AMP, 5000 uV OFFSET-MAX, 4 MHz BAND WIDTH, PDSO8
封裝: MSOP-8
文件頁數(shù): 7/10頁
文件大小: 181K
代理商: KM4212IM8TR3
REV. 1 August 2001
7
Layout Considerations
General layout and supply bypassing play major roles
in high frequency performance. Fairchild has evaluation
boards to use as a guide for high frequency layout
and to aid in device testing and characterization.
Follow the steps below as a basis for high frequency
layout:
I
Include 6.8
μ
F and 0.01
μ
F ceramic capacitors
I
Place the 6.8
μ
F capacitor within 0.75 inches
of the power pin
I
Place the 0.01
μ
F capacitor within 0.1 inches
of the power pin
I
Remove the ground plane under and around the
part, especially near the input and output pins to
reduce parasitic capacitance
I
Minimize all trace lengths to reduce
series inductances
Refer to the evaluation board layouts shown in Figure
6 for more information.
When evaluating only one channel, complete the
following on the unused channel
1. Ground the non-inverting input
2. Short the output to the inverting input
Evaluation Board Information
The following evaluation boards are available to aid
in the testing and layout of this device:
Evaluation board schematics and layouts are shown in
Figure 5 and Figure 6.
The KEB002 evaluation board is built for dual supply
operation. Follow these steps to use the board in a
single supply application:
1. Short -V
s
to ground
2. Use C3 and C4, if the -V
s
pin of the KM4212 is not
directly connected to the ground plane.
Figure 5: Evaluation Board Schematic
KM4212
DATA SHEET
Eval Board
KEB006
Description
Products
KM4212IC8
Dual Channel,
Dual Supply 8 lead SOIC
Dual Channel,
Dual Supply 8 lead MSOP
KEB010
KM4212IM8
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