
KM416C254D, KM416V254D
CMOS DRAM
CAPACITANCE
(T
A
=25
°
C, V
CC
=5V or 3.3V, f=1MHz)
Parameter
Symbol
Min
Max
Units
Input capacitance [A0 ~ A8]
C
IN1
-
5
pF
Input capacitance [RAS, UCAS, LCAS, W, OE]
C
IN2
-
7
pF
Output capacitance [DQ0 - DQ15]
C
DQ
-
7
pF
Test condition (5V device) : V
CC
=5.0V
±
10%, Vih/Vil=2.4/0.8V, Voh/Vol=2.0/0.8V
Test condition (3.3V device) : V
CC
=3.3V
±
0.3V, Vih/Vil=2.2/0.7V, Voh/Vol=2.0/0.8V
Note) *1 : 5V only
Parameter
Symbol
-5
*1
-6
-7
Units
Notes
Min
Max
Min
Max
Min
Max
Random read or write cycle time
t
RC
t
RWC
t
RAC
t
CAC
t
AA
t
CLZ
t
CEZ
t
T
84
104
124
ns
Read-modify-write cycle time
116
138
163
ns
Access time from RAS
50
60
70
ns
3,4,10
Access time from CAS
15
15
20
ns
3,4,5
Access time from column address
25
30
35
ns
3,10
CAS to output in Low-Z
3
3
3
ns
3
Output buffer turn-off delay from CAS
3
13
3
13
3
18
ns
6,12
Transition time (rise and fall)
2
50
2
50
2
50
ns
2
RAS precharge time
t
RP
t
RAS
t
RSH
t
CSH
t
CAS
t
RCD
t
RAD
t
CRP
t
ASR
t
RAH
t
ASC
t
CAH
30
40
50
ns
RAS pulse width
50
10K
60
10K
70
10K
ns
RAS hold time
15
15
20
ns
CAS hold time
40
50
60
ns
CAS pulse width
8
10K
10
10K
15
10K
ns
RAS to CAS delay time
20
35
20
45
20
50
ns
4
RAS to column address delay time
15
25
15
30
15
35
ns
10
CAS to RAS precharge time
5
5
5
ns
Row address set-up time
0
0
0
ns
Row address hold time
10
10
10
ns
Column address set-up time
0
0
0
ns
13
Column address hold time
8
10
15
ns
13
Column address to RAS lead time
t
RAL
t
RCS
t
RCH
t
RRH
t
WCS
t
WCH
t
WP
t
RWL
t
CWL
25
30
35
ns
Read command set-up time
0
0
0
ns
Read command hold time referenced to CAS
0
0
0
ns
8
Read command hold time referenced to RAS
0
0
0
ns
8
Write command set-up time
0
0
0
ns
7
Write command hold time
10
10
10
ns
Write command pulse width
10
10
10
ns
Write command to RAS lead time
13
15
15
ns
Write command to CAS lead time
8
10
15
ns
16
AC CHARACTERISTICS
(0
°
C
≤
T
A
≤
70
°
C, See note 1,2)