參數(shù)資料
型號: KB2512
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: DEFLECTION PROCESSOR FOR MULTISYNC MONITORS
中文描述: 偏轉(zhuǎn)處理器多同步監(jiān)測儀
文件頁數(shù): 24/36頁
文件大?。?/td> 365K
代理商: KB2512
KB2512 DEFLECTION PROCESSOR FOR MULTISYNC MONITORS
23
Read Mode
During read mode the second byte transmits the reply information.
The reply byte contains horizontal and vertical lock/unlock status, the XRAY activated or not, the horizontal and
vertical polarity detection. It also contains the Synchro detection status which is used by the MCU to assign sync
priority.
A stop condition always stops all the activities of the bus decoder and switches to high impedance both the data
and the clock line (SDA and SCL) .
See I
2
C sub address and control tables.
Sync processor
The internal sync processor allows the KB2512 to accept any kind of input Synchro signals:
Separated horizontal & vertical TTL-compatible sync signals,
Composite horizontal & vertical TTL-compatible sync signals.
Sync identification Status
The MCU can read (address read mode: 8D) the status register via the I
2
C bus, and then select the sync priority
depending on this status.
Among other data this register indicates the presence of sync pulses on H/HVIN, VSYNCIN and (when 12V is
supplied) whether a Vext has been extracted from H/HVIN. Both horizontal and vertical sync are detected even if
only 5V is supplied.
In order to choose the right sync priority the MCU may proceed as follows (see I
2
C address Table):
Refresh the status register,
Wait at least for 20ms(max. vertical period),
Read this status register,
Sync priority choice should be:
Of course, when choice is made, one can refresh the sync detections and verify that extracted Vsync is present
and that no sync change occurred.
The Sync processor is also giving sync polarity information.
IC status
The IC can inform the MCU about the 1st horizontal PLL and vertical section status, and about the XARY
protection (activated or not). Resetting the XRAY internal latch can be done either by decreasing the Vcc supply or
directly resetting it via the I
2
C interface.
Vext Det
No
Yes
H/V Det
Yes
Yes
V Det
Yes
No
Sync Priority Subaddress 03 (D8)
1
0
Comment Sync Type
Separated H & V
Composite TTL H & V
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