參數(shù)資料
型號： K9F3208W0A-TCB0
廠商： SAMSUNG SEMICONDUCTOR CO. LTD.
元件分類： 圓形連接器
英文描述： Circular Connector; MIL SPEC:MIL-DTL-38999 Series III; Body Material:Metal; Series:TVPS00; Number of Contacts:37; Connector Shell Size:25; Connecting Termination:Crimp; Circular Shell Style:Wall Mount Receptacle; Body Style:Straight
中文描述： 4米× 8位NAND閃存
文件頁數(shù)： 5/27頁
文件大小： 558K
代理商： K9F3208W0A-TCB0
K9F3208W0A-TCB0, K9F3208W0A-TIB0
FLASH MEMORY
5
PIN DESCRIPTION
Command Latch Enable(CLE)
The CLE input controls the path activation for commands sent to the command register. When active high, commands are latched
into the command register through the I/O ports on the rising edge of the WE signal.
Address Latch Enable(ALE)
The ALE input controls the activating path for address to the internal address registers. Addresses are latched on the rising edge of
WE with ALE high.
Chip Enable(CE)
The CE input is the device selection control. When CE goes high during a read operation the device is returned to standby mode.
However, when the device is in the busy state during program or erase, CE high is ignored, and does not return the device to standby
mode.
Write Enable(WE)
The WE input controls writes to the I/O port. Commands, address and data are latched on the rising edge of the WE pulse.
Read Enable(RE)
The RE input is the serial data-out control, and when active drives the data onto the I/O bus. Data is valid tREA after the falling edge
of RE which also increments the internal column address counter by one.
Spare Area Enable(SE)
The SE input controls the access of the spare area. When SE is high, the spare area is not accessible for reading or programming.
SE is recommended to be coupled to GND or Vcc and should not be toggled during reading or programming.
I/O Port : I/O 0 ~ I/O 7
The I/O pins are used to input command, address and data, and to output data during read operations. The I/O pins float to high-z
when the chip is deselected or when the outputs are disabled.
Write Protect(WP)
The WP pin provides inadvertent write/erase protection during power transitions. The internal high voltage generator is reset when
the WP pin is active low.
Ready/Busy(R/B)
The R/B output indicates the status of the device operation. When low, it indicates that a program, erase or random read operation is
in process and returns to high state upon completion. It is an open drain output and does not float to high-z condition when the chip
is deselected or when outputs are disabled.
Power Line(V
CC
& V
CCQ
)
The V
CCQ
is the power supply for I/O interface logic. It is electrically isolated from main power line(V
CC
=2.7~5.5V) for supporting 5V
tolerant I/O with 5V power supply at V
CCQ
.
相關PDF資料
PDF描述
K9F3208W0A-TIB0 Circular Connector; MIL SPEC:MIL-DTL-38999 Series III; Body Material:Metal; Series:TVPS00; No. of Contacts:37; Connector Shell Size:25; Connecting Termination:Crimp; Circular Shell Style:Wall Mount Receptacle; Body Style:Straight
K9F4008W0A 512K x 8 bit NAND Flash Memory
K9F4008W0A- 512K x 8 bit NAND Flash Memory
K9F4008W0A-TCB0 Circular Connector; MIL SPEC:MIL-DTL-38999 Series III; Body Material:Metal; Series:TVPS00; No. of Contacts:37; Connector Shell Size:25; Connecting Termination:Crimp; Circular Shell Style:Wall Mount Receptacle; Body Style:Straight
K9F4008W0A-TIB0 Circular Connector; MIL SPEC:MIL-DTL-38999 Series III; Body Material:Metal; Series:TVPS00; No. of Contacts:37; Connector Shell Size:25; Connecting Termination:Crimp; Circular Shell Style:Wall Mount Receptacle; Body Style:Straight
相關代理商/技術參數(shù)
參數(shù)描述
K9F3208W0A-TIB0 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:4M x 8 Bit NAND Flash Memory
K9F4008W0A 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512K x 8 bit NAND Flash Memory
K9F4008W0A- 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512K x 8 bit NAND Flash Memory
K9F4008W0A-TCB0 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512K x 8 bit NAND Flash Memory
K9F4008W0A-TIB0 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512K x 8 bit NAND Flash Memory
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