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參數(shù)資料
| 型號： | K7J163682B |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 512Kx36 & 1Mx18 DDR II SIO b2 SRAM |
| 中文描述： | 512Kx36 |
| 文件頁數(shù)： | 7/17頁 |
| 文件大?。?/td> | 374K |
| 代理商： | K7J163682B |
512Kx36 & 1Mx18 DDR II SIO b2 SRAM
- 7 -
Rev 3.1
July. 2004
K7J163682B
K7J161882B
STATE DIAGRAM
Notes
: 1. Internal burst counter is fixed as 2-bit linear, i.e. when first address is A0+0, next internal burst address is A0+1.
2. "LOAD" refers to read new address active status with LD=Low, "LOAD" refers to read new address inactive status with LD=High.
3. "READ" refers to read active read status with R/W=High, "WRITE" refers to write active status with R/W=Low
LOAD
LOAD
LOAD
LOAD
POWER-UP
NOP
LOAD NEW ADDRESS
DDR READ
DDR WRITE
LOAD
LOAD
READ
WRITE
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| K7J321882M | 1Mx36 & 2Mx18 DDR II SIO b2 SRAM |
| K7J323682M | 1Mx36 & 2Mx18 DDR II SIO b2 SRAM |
| K7J641882M | 72Mb M-die DDRII SRAM Specification |
| K7J641882M-FC16 | 72Mb M-die DDRII SRAM Specification |
| K7J641882M-FC20 | 72Mb M-die DDRII SRAM Specification |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| K7J163682B-FC25000 | 制造商:Samsung Semiconductor 功能描述:SRAM Chip Sync Dual 1.8V 18M-Bit 512K x 36 0.45ns 165-Pin FBGA |
| K7J321882C | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:1Mx36 & 2Mx18 DDR II SIO b2 SRAM |
| K7J321882C-FC27000 | 制造商:Samsung Semiconductor 功能描述:32M 32MSYNC DOUBLE DATA RATE, SEPARATE I/O X18 FBGA - Trays |
| K7J321882C-FC30T00 | 制造商:Samsung Semiconductor 功能描述:32MSYNC DDRII, SEPARATE I/O SRAMX18FBGA, T/R - Tape and Reel |
| K7J321882M | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:1Mx36 & 2Mx18 DDR II SIO b2 SRAM |
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