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參數(shù)資料
| 型號(hào)： | K7D803671B-HC37 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 256Kx36 & 512Kx18 SRAM |
| 中文描述： | 256Kx36 |
| 文件頁(yè)數(shù)： | 5/16頁(yè) |
| 文件大?。?/td> | 270K |
| 代理商： | K7D803671B-HC37 |
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Rev 4.0
256Kx36 & 512Kx18 SRAM
- 5 -
January. 2002
K7D801871B
K7D803671B
4 Burst Operation for Interleaved Burst (LBO = V
DDQ
)
Interleaved Burst
NOTE
: - For Interleave Burst LBO = V
DDQ
is recommended. If LBO = V
DD
, it must not exceed 2.63V.
Case 1
Case 2
Case 3
Case 4
A
1
A
0
A
1
A
0
A
1
A
0
A
1
A
0
First Address
Fourth Address
0
0
1
1
0
1
0
1
0
0
1
1
1
0
1
0
1
1
0
0
0
1
0
1
1
1
0
0
1
0
1
0
TRUTH TABLE
NOTE
: - B(Both) is DIN in write cycle and DOUT in read cycle. Byte write function is not supported. X means "Don't Care".
- K & K are complementary.
K
G
B1
B2
B3
DQ
Operation
L
X
X
X
X
Hi-Z
Clock Stop
↑
↑
↑
↑
↑
↑
X
H
L
X
Hi-Z
No Operation, Pipeline High-Z
L
L
H
H
DOUT
Load Address, Single Read
L
L
H
L
DOUT
Load Address, Double Read
X
L
L
H
DIN
Load Address, Single Write
X
L
L
L
DIN
Load Address, Double Write
X
H
H
X
B
Increment Address, Continue
BURST SEQUENCE TABLE
4 Burst Operation for Linear Burst (LBO = V
SS
)
Linear Burst Mode
Case 1
Case 2
Case 3
Case 4
A
1
A
0
A
1
A
0
A
1
A
0
A
1
A
0
First Address
Fourth Address
0
0
1
1
0
1
0
1
0
1
1
0
1
0
1
0
1
1
0
0
0
1
0
1
1
0
0
1
1
0
1
0
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| K7FU12 | 制造商:3M Electronic Products Division 功能描述:SPP3 TRAY KIT FOR 12 FUSION SPLICES |
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| K7I161882B-FC16 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512Kx36-bit, 1Mx18-bit DDRII CIO b2 SRAM |
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