參數(shù)資料
型號(hào)： K4S510832B-TCL75
廠商： SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述： 512Mb B-die SDRAM Specification
中文描述： 512MB的乙芯片內(nèi)存規(guī)格
文件頁(yè)數(shù)： 15/15頁(yè)
文件大?。?/td> 149K
代理商： K4S510832B-TCL75
CMOS SDRAM
SDRAM 512Mb B-die (x4, x8, x16)
Rev. 1.1 February 2004
SIMPLIFIED TRUTH TABLE
(V=Valid, X=Don't care, H=Logic high, L=Logic low)
Command
CKEn-1
CKEn
CS
RAS
CAS
WE
DQM
BA
0,1
A
10
/AP
A
0
~ A
9
A
11,
A
12
Note
Register
Mode register set
Auto refresh
H
X
H
L
L
L
L
X
OP code
1,2
3
Refresh
H
L
L
L
H
X
X
Self
refresh
Entry
L
3
3
Exit
L
H
L
H
H
H
X
X
H
L
X
L
X
H
X
H
3
Bank active & row addr.
H
X
X
V
Row address
Read &
column address
Auto precharge disable
Auto precharge enable
H
X
L
H
L
H
X
V
L
H
Column
4
4,5
Write &
column address
Auto precharge disable
Auto precharge enable
H
X
L
H
L
L
X
V
L
H
Column
address
4
4,5
Burst stop
H
X
L
H
H
L
X
X
6
Precharge
Bank selection
H
X
L
L
H
L
X
V
L
X
All banks
X
H
Clock suspend or
active power down
Entry
H
L
H
X
X
X
X
X
L
X
V
X
V
X
V
X
Exit
L
H
X
Precharge power down mode
Entry
H
L
H
L
X
H
X
H
X
H
X
X
Exit
L
H
H
L
X
V
X
V
X
V
X
DQM
H
X
X
V
X
7
No operation command
H
X
H
X
X
X
X
L
H
H
H
1. OP Code : Operand code
A
0
~ A
12
& BA
0
~ BA
1
: Program keys. (@ MRS)
2. MRS can be issued only at all banks precharge state.
A new command can be issued after 2 CLK cycles of MRS.
3. Auto refresh functions are as same as CBR refresh of DRAM.
The automatical precharge without row precharge command is meant by "Auto".
Auto/self refresh can be issued only at all banks precharge state.
4. BA
0
~ BA
1
: Bank select addresses.
If both BA
0
and BA
1
are "Low" at read, write, row active and precharge, bank A is selected.
If BA
0
is "High" and BA
1
is "Low" at read, write, row active and precharge, bank B is selected.
If BA
0
is "Low" and BA
1
is "High" at read, write, row active and precharge, bank C is selected.
If both BA
0
and BA
1
are "High" at read, write, row active and precharge, bank D is selected.
If A
10
/AP is "High" at row precharge, BA
0
and BA
1
is ignored and all banks are selected.
5. During burst read or write with auto precharge, new read/write command can not be issued.
Another bank read/write command can be issued after the end of burst.
New row active of the associated bank can be issued at t
RP
after the end of burst.
6. Burst stop command is valid at every burst length.
7. DQM sampled at positive going edge of a CLK and masks the data-in at the very CLK (Write DQM latency is 0),
but makes Hi-Z state the data-out of 2 CLK cycles after. (Read DQM latency is 2)
Notes :
相關(guān)PDF資料
PDF描述
K4S511632B-TC75 512Mb B-die SDRAM Specification
K4S511632B-TCL75 512Mb B-die SDRAM Specification
K4S510432B-UC 512Mb B-die SDRAM Specification
K4S511632B-CL75 512Mb B-die SDRAM Specification
K4S510432B-CL75 512Mb B-die SDRAM Specification
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
K4S510832B-UC75 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512Mb B-die SDRAM Specification
K4S510832D 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:SDRAM Product Guide
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K4S510832D-UC75000 制造商:Samsung Semiconductor 功能描述:DRAM CHIP SDRAM 512MBIT 3.3V 54TSOP-II - Bulk
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