參數(shù)資料
型號(hào)： K4R881869M-NbCcG6
廠商： SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述： 288Mbit RDRAM 512K x 18 bit x 2*16 Dependent Banks Direct RDRAMTM
中文描述： 288Mbit RDRAM的為512k × 18位× 2 * 16屬銀行直接RDRAMTM
文件頁(yè)數(shù)： 47/64頁(yè)
文件大?。?/td> 4084K
代理商： K4R881869M-NBCCG6
Page 45
Direct RDRAM
K4R881869M
Rev. 0.9 Jan. 2000
Preliminary
t
DR2,
t
DF2
CMD, SCK input rise and fall times
-
2.0
ns
Figure 56
t
CYCLE1
SCK cycle time - Serial control register transactions
1000
-
ns
Figure 56
SCK cycle time - Power transitions
10
-
ns
Figure 56
t
CH1
, t
CL1
SCK high and low times
4.25
-
ns
Figure 56
t
S1
CMD setup time to SCK rising or falling edge
e
1.25
-
ns
Figure 56
t
H1
CMD hold time to SCK rising or falling edge
e
1
-
ns
Figure 56
t
S2
SIO0 setup time to SCK falling edge
40
-
ns
Figure 56
t
H2
SIO0 hold time to SCK falling edge
40
-
ns
Figure 56
t
S3
PDEV setup time on DQA5..0 to SCK rising edge.
0
-
ns
Figure 48,
Figure 57
t
H3
PDEV hold time on DQA5..0 to SCK rising edge.
5.5
-
ns
t
S4
ROW2..0, COL4..0 setup time for quiet window
-1
-
t
CYCLE
Figure 48
t
H4
ROW2..0, COL4..0 hold time for quiet window
f
5
-
t
CYCLE
Figure 48
v
IL,CMOS
CMOS input low voltage - over/undershoot voltage duration is less
than or equal to 5ns
- 0.7
V
CMOS
/2 -
0.4
V
v
IH,CMOS
CMOS input high voltage - over/undershoot voltage duration is
less than or equal to 5ns
V
CMOS
/2
+ 0.4
V
CMOS
+
0.7
V
t
NPQ
Quiet on ROW/COL bits during NAP/PDN entry
4
-
t
CYCLE
Figure 47
t
READTOCC
Offset between read data and CC packets (same device)
12
-
t
CYCLE
Figure 51
t
CCSAMTOREAD
Offset between CC packet and read data (same device)
8
-
t
CYCLE
Figure 51
t
CE
CTM/CFM stable before NAP/PDN exit
2
-
t
CYCLE
Figure 48
t
CD
CTM/CFM stable after NAP/PDN entry
100
-
t
CYCLE
Figure 47
t
FRM
ROW packet to COL packet ATTN framing delay
7
-
t
CYCLE
Figure 46
t
NLIMIT
Maximum time in NAP mode
10.0
μ
s
Figure 45
t
REF
Refresh interval
32
ms
Figure 50
t
CCTRL
Current control interval
34 t
CYCLE
100ms
ms/t
CYCLE
Figure 51
t
TEMP
Temperature control interval
100
ms
Figure 52
t
TCEN
TCE command to TCAL command
150
-
t
CYCLE
Figure 52
t
TCAL
TCAL command to quiet window
2
2
t
CYCLE
Figure 52
t
TCQUIET
Quiet window (no read data)
140
-
t
CYCLE
Figure 52
t
PAUSE
RDRAM delay (no RSL operations allowed)
200.0
μ
s
page 28
a. MSE/MS are fields of the SKIP register. For this combination (skip override) the tDCW parameter range is effectively 0.0 to 0.0.
b. This parameter also applies to a -800 or -711 part when operated with t
CYCLE
=3.33ns.
c. This parameter also applies to a -800 part when operated with t
CYCLE
=2.81ns.
d. t
S,MIN
and t
H,MIN
for other t
CYCLE
values can be interpolated between or extrapolated from the timings at the 3 specified t
CYCLE
values.
e. With V
IL,CMOS
=0.5V
CMOS
-0.4V and V
IH,CMOS
=0.5V
CMOS
+0.4V
f. Effective hold becomes t
H4
’=t
H4
+[PDNXA64t
SCYCLE
+t
PDNXB,MAX
]-[PDNX256t
SCYCLE
]
if [PDNX256t
SCYCLE
] < [PDNXA64t
SCYCLE
+t
PDNXB,MAX
]. See Figure 48.
Table 19: Timing Conditions
Symbol
Parameter
Min
Max
Unit
Figure(s)
相關(guān)PDF資料
PDF描述
K4R881869M-NCK7 288Mbit RDRAM 512K x 18 bit x 2*16 Dependent Banks Direct RDRAMTM
K4R881869M-NCK8 288Mbit RDRAM 512K x 18 bit x 2*16 Dependent Banks Direct RDRAMTM
K4S280432A 128Mbit SDRAM 8M x 4Bit x 4 Banks Synchronous DRAM LVTTL
K4S280432C 128Mbit SDRAM 8M x 4Bit x 4 Banks Synchronous DRAM LVTTL
K4S280432F-UC 128Mb F-die SDRAM Specification 54 TSOP-II with Pb-Free (RoHS compliant)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
K4R881869M-NCK7 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:288Mbit RDRAM 512K x 18 bit x 2*16 Dependent Banks Direct RDRAMTM
K4R881869M-NCK8 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:288Mbit RDRAM 512K x 18 bit x 2*16 Dependent Banks Direct RDRAMTM
K4R881869M-NCK8000 制造商:Samsung SDI 功能描述:
K4S160822D 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:2Mx8 SDRAM 1M x 8bit x 2 Banks Synchronous DRAM LVTTL
K4S160822DT-G/F10 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:2Mx8 SDRAM 1M x 8bit x 2 Banks Synchronous DRAM LVTTL
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*