參數(shù)資料
型號(hào): K4D623238B-GC
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 64Mbit DDR SDRAM
中文描述: 64Mb的DDR SDRAM內(nèi)存
文件頁(yè)數(shù): 13/17頁(yè)
文件大?。?/td> 147K
代理商: K4D623238B-GC
64M DDR SDRAM
K4D623238B-GC
- 13 -
Rev. 1.4 (Sep. 2002)
AC CHARACTERISTICS
Simplified Timing @ BL=2, CL=4
Parameter
Symbol
-33
-40
-45
-50
-55
-60
Unit Note
Min
-
-
Max
Min
5.0
4.0
Max
Min
5.0
4.5
Max
Min
5.0
-
-
0.45
Max
Min
5.5
-
-
0.45
Max
Min
6.0
-
-
0.45
Max
CK cycle time
CL=3
CL=4
t
CK
7
10
10
10
10
10
ns
ns
CL=5
3.3
0.45
-
-
ns
tCK
CK high level width
t
CH
t
CL
t
DQSCK
t
AC
t
DQSQ
t
RPRE
t
RPST
t
DQSS
t
WPRES
t
WPREH
t
WPST
t
DQSH
t
DQSL
0.55
0.45
0.55
0.45
0.55
0.55
0.55
0.55
CK low level width
DQS out access time from CK
0.45
-0.6
0.55
0.6
0.45
-0.6
0.55
0.6
0.45
-0.7
0.55
0.7
0.45
-0.7
0.55
0.7
0.45
-0.75
0.55
0.75
0.45
-0.75
0.55
0.75
tCK
ns
Output access time from CK
-0.6
0.6
-0.6
0.6
-0.7
0.7
-0.7
0.7
-0.75
0.75
-0.75
0.75
ns
Data strobe edge to Dout edge
Read preamble
-
0.35
1.1
-
0.4
1.1
-
0.45
1.1
-
0.45
1.1
-
0.5
1.1
-
0.5
1.1
ns
tCK
1
0.9
0.9
0.9
0.9
0.9
0.9
Read postamble
CK to valid DQS-in
0.4
0.85
0.6
1.15
0.4
0.85
0.6
1.15
0.4
0.8
0.6
1.2
0.4
0.8
0.6
1.2
0.4
0.75
0.6
1.25
0.4
0.75
0.6
1.25
tCK
tCK
DQS-In setup time
0
-
0
-
0
-
0
-
0
-
0
-
ns
DQS-in hold time
DQS write postamble
0.35
0.4
-
0.35
0.4
-
0.3
0.4
-
0.3
0.4
-
0.25
0.4
-
0.25
0.4
-
tCK
tCK
0.6
0.6
0.6
0.6
0.6
0.6
DQS-In high level width
DQS-In low level width
Address and Control input setup
t
IS
0.4
0.4
0.6
0.6
0.4
0.4
0.6
0.6
0.4
0.4
0.6
0.6
0.4
0.4
0.6
0.6
0.4
0.4
0.6
0.6
0.4
0.4
0.6
0.6
tCK
tCK
0.9
-
0.9
-
1.0
-
1.0
-
1.1
-
1.1
-
ns
Address and Control input hold
DQ and DM setup time to DQS
t
IH
t
DS
t
DH
0.9
0.35
-
-
0.9
0.4
-
-
1.0
0.45
-
-
1.0
0.45
-
-
1.1
0.5
-
-
1.1
0.5
-
-
ns
ns
DQ and DM hold time to DQS
0.35
tCLmin
or
tCHmin
tHP-
0.35
-
0.4
-
0.45
tCLmin
or
tCHmin
tHP-
0.45
-
0.45
tCLmin
or
tCHmin
tHP-
0.45
-
0.5
-
0.5
-
ns
Clock half period
t
HP
-
tCLmin
or
tCHmin
-
-
-
tCLmin
or
tCHmin
-
tCLmin
or
tCHmin
-
ns
1
Data output hold time from DQS
t
QH
-
tHP-0.4
-
-
-
tHP-0.5
-
tHP-0.5
-
ns
1
1
3
4
6
7
tCL
tCK
CK, CK
DQS
DQ
CS
DM
2
5
tIS
tIH
8
tDS tDH
0
tRPST
tRPRE
Db0
Db1
tDQSS
tDQSH
tDQSL
tCH
Qa1
Qa2
COMMAND
READA
WRITEB
tDQSQ
t
WPRES
t
WPREH
tDQSCK
tAC
相關(guān)PDF資料
PDF描述
K4D64163HF 1M x 16Bit x 4 Banks Double Data Rate Synchronous DRAM
K4D64163HF-TC33 1M x 16Bit x 4 Banks Double Data Rate Synchronous DRAM
K4D64163HF-TC36 1M x 16Bit x 4 Banks Double Data Rate Synchronous DRAM
K4D64163HF-TC40 1M x 16Bit x 4 Banks Double Data Rate Synchronous DRAM
K4D64163HF-TC50 1M x 16Bit x 4 Banks Double Data Rate Synchronous DRAM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
K4D623238B-GC/L33 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:64Mbit DDR SDRAM
K4D623238B-GC/L40 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:64Mbit DDR SDRAM
K4D623238B-GC/L45 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:64Mbit DDR SDRAM
K4D623238B-GC/L50 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:64Mbit DDR SDRAM
K4D623238B-GC/L55 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:64Mbit DDR SDRAM