參數(shù)資料
型號(hào)： IT8712F
英文描述： EC-LPC I/O Programming Guide EC-v0.2 | PC Product Line
中文描述： 歐盟預(yù)測(cè)編碼的I / O編程指南歐共體v0.2 |個(gè)人電腦產(chǎn)品線(xiàn)
文件頁(yè)數(shù)： 11/30頁(yè)
文件大小： 311K
代理商： IT8712F
4. Programming Sequence and Flow Charts
4.1
Configuring Sequence Description
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Programming Sequence and Flow Charts
Hardware Reset
Wait for key string
Is the data
"87h"
MB PnP Mode
"87h"
Y
N
Any other I/O transition cycle
I/O write to 2Eh (or 4Eh)
Y
Wait for next data
Any other I/O transition cycle
I/O write to 2Eh (or 4Eh)
N
Figure 4-1
.
Enter the MB PnP Mode Flow Chart
(1) Enter the MB PnP Mode
To enter the MB PnP Mode, 2 specific I/O write operations (87h) must be performed during the “Wait for key”
state. The addresses of the configuration Index/Data register pair are determined by the power-on strapping of
pin 89 (JP3). 2Eh/2Fh is selected when the power-on strapping value of this pin is high (internal pull-up
resistor); 4Eh/4Fh is selected when the power-on strapping value of this pin is low (external pull-down resistor).
(2) Modifying the Data of the Registers
All configuration registers can be accessed after the MB PnP Mode is accessed. Before accessing a selected
register, the content of Index 07h must be changed to the LDN to which the register belongs, except some
Global registers.
(3) Exiting the MB PnP Mode
Set bit 1 of the configure control register (Index=02h) to “1” to exit the MB PnP Mode.
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