Specifications ispLSI 1048E 3 USE ispLSI 1048EA FOR NEW DESIGNS Absolute Maximum Ratings 1
參數(shù)資料
型號(hào): ISPLSI 1048E-70LQNI
廠商: Lattice Semiconductor Corporation
文件頁(yè)數(shù): 11/17頁(yè)
文件大小: 0K
描述: IC PLD ISP 96I/O 15NS 128PQFP
標(biāo)準(zhǔn)包裝: 24
系列: ispLSI® 1000E
可編程類(lèi)型: 系統(tǒng)內(nèi)可編程
最大延遲時(shí)間 tpd(1): 15.0ns
電壓電源 - 內(nèi)部: 4.5 V ~ 5.5 V
邏輯元件/邏輯塊數(shù)目: 48
門(mén)數(shù): 8000
輸入/輸出數(shù): 96
工作溫度: -40°C ~ 85°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 128-BQFP
供應(yīng)商設(shè)備封裝: 128-PQFP(28x28)
包裝: 托盤(pán)
其它名稱(chēng): 220-1599
ISPLSI 1048E-70LQNI-ND
ISPLSI1048E-70LQNI
Specifications ispLSI 1048E
3
USE
ispLSI
1048EA
FOR
NEW
DESIGNS
Absolute Maximum Ratings 1
Supply Voltage Vcc. ................................. -0.5 to +7.0V
Input Voltage Applied ........................ -2.5 to VCC +1.0V
Off-State Output Voltage Applied ..... -2.5 to VCC +1.0V
Storage Temperature ................................ -65 to 150°C
Case Temp. with Power Applied .............. -55 to 125°C
Max. Junction Temp. (TJ) with Power Applied ... 150°C
1. Stresses above those listed under the “Absolute Maximum Ratings” may cause permanent damage to the device. Functional
operation of the device at these or at any other conditions above those indicated in the operational sections of this specification
is not implied (while programming, follow the programming specifications).
DC Recommended Operating Conditions
Capacitance (T
A=25
oC, f=1.0 MHz)
Data Retention Specifications
C
SYMBOL
Table 2-0006/1048E
C
PARAMETER
Y0 Clock Capacitance
15
UNITS
TYPICAL
TEST CONDITIONS
1
2
8
Dedicated Input, I/O, Y1, Y2, Y3, Clock Capacitance
pf
V = 5.0V, V
= 2.0V
V = 5.0V, V
= 2.0V
CC
PIN
TA = 0°C to + 70°C
TA = -40°C to + 85°C
SYMBOL
Table 2-0005/1048E
VCC
VIH
VIL
PARAMETER
Supply Voltage
Input High Voltage
Input Low Voltage
MIN.
MAX.
UNITS
4.75
4.5
2.0
0
5.25
5.5
Vcc+1
0.8
V
Commercial
Industrial
Table 2-0008/1048E
PARAMETER
Data Retention
MINIMUM
MAXIMUM
UNITS
Erase/Reprogram Cycles
20
10000
Years
Cycles
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