參數(shù)資料
型號: ISP1181BBS,551
廠商: ST-ERICSSON
元件分類: 總線控制器
英文描述: UNIVERSAL SERIAL BUS CONTROLLER, PQCC48
封裝: 7 X 7 MM, 0.85 MM HEIGHT, PLASTIC, MO-220, SOT-619-2, HVQFN-48
文件頁數(shù): 32/71頁
文件大?。?/td> 351K
代理商: ISP1181BBS,551
Philips Semiconductors
ISP1181B
Full-speed USB peripheral controller
Product data
Rev. 02 — 07 December 2004
37 of 70
9397 750 13958
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
12.3.2
Unlock Device
This command unlocks the ISP1181B from write-protection mode after a ‘resume’. In
‘suspend’ state all registers and FIFOs are write-protected to prevent data corruption
by external devices during a ‘resume’. Also, the register access for reading is possible
only after the ‘Unlock Device’ command is executed.
After waking up from ‘suspend’ state, the rmware must unlock the registers and
FIFOs via this command, by writing the unlock code (AA37H) into the Lock Register
(8-bit bus: lower byte rst). The bit allocation of the Lock Register is given in Table 38.
Code (Hex): B0 — unlock the device
Transaction — write 2 bytes (unlock code)
5
-
reserved
4 to 1
ERROR[3:0]
Error code. For error description, see Table 37.
0
RTOK
A logic 1 indicates that data was received or transmitted
successfully.
Table 37:
Transaction error codes
Error code
(Binary)
Description
0000
no error
0001
PID encoding error; bits 7 to 4 are not the inverse of bits 3 to 0
0010
PID unknown; encoding is valid, but PID does not exist
0011
unexpected packet; packet is not of the expected type (token, data, or
acknowledge), or is a SETUP token to a non-control endpoint
0100
token CRC error
0101
data CRC error
0110
time-out error
0111
babble error
1000
unexpected end-of-packet
1001
sent or received NAK (Not AcKnowledge)
1010
sent Stall; a token was received, but the endpoint was stalled
1011
overow; the received packet was larger than the available buffer space
1100
sent empty packet (ISO only)
1101
bit stufng error
1110
sync error
1111
wrong (unexpected) toggle bit in DATA PID; data was ignored
Table 36:
Error Code Register: bit description…continued
Bit
Symbol
Description
Table 38:
Lock Register: bit allocation
Bit
15
14
13
12
11
10
9
8
Symbol
UNLOCKH[7:0] = AAH
Reset
10101010
Access
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