參數(shù)資料
型號: ISP1181BBS,551
廠商: ST-ERICSSON
元件分類: 總線控制器
英文描述: UNIVERSAL SERIAL BUS CONTROLLER, PQCC48
封裝: 7 X 7 MM, 0.85 MM HEIGHT, PLASTIC, MO-220, SOT-619-2, HVQFN-48
文件頁數(shù): 16/71頁
文件大小: 351K
代理商: ISP1181BBS,551
Philips Semiconductors
ISP1181B
Full-speed USB peripheral controller
Product data
Rev. 02 — 07 December 2004
22 of 70
9397 750 13958
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
11.2 Resume conditions
A wake-up from the suspend state is initiated either by the USB host or by the
application:
USB host: drives a K-state on the USB bus (global resume)
Application: remote wake-up through a HIGH level on input WAKEUP or a LOW
level on input CS (if enabled using bit WKUPCS in the Hardware Conguration
register). Wake-up on CS will work only if VBUS is present.
The steps of a wake-up sequence are as follows:
1. The internal oscillator and the PLL multiplier are re-enabled. When stabilized, the
clock signals are routed to all internal circuits of the ISP1181B.
2. The SUSPEND output is deasserted, and bit RESUME in the Interrupt register is
set. This will generate an interrupt if bit IERESM in the Interrupt Enable register is
set.
3. Maximum 15 ms after starting the wake-up sequence, the ISP1181B resumes its
normal functionality.
4. In case of a remote wake-up, the ISP1181B drives a K-state on the USB bus for
10 ms.
5. Following the deassertion of output SUSPEND, the application restores itself and
other system components to the normal operating mode.
6. After wake-up, the internal registers of the ISP1181B are write-protected to
prevent corruption by inadvertent writing during power-up of external
components. The rmware must send an Unlock Device command to the
ISP1181B to restore its full functionality.
11.3 Control bits in suspend and resume
Fig 7.
SUSPEND and WAKEUP signals in a powered-off modem application.
WAKEUP
8031
RST
RING DETECTION
ISP1181B
DP
DM
USB
VBUS
VCC
LINE
004aaa672
SUSPEND
Table 12:
Summary of control bits
Register
Bit
Function
Interrupt
SUSPND
a transition from awake to the suspend state was detected
BUSTATUS
monitors USB bus status (logic 1 = suspend); used when
interrupt is serviced
RESUME
a transition from suspend to the resume state was detected
相關(guān)PDF資料
PDF描述
ISP1181BBS,518 UNIVERSAL SERIAL BUS CONTROLLER, PQCC48
ISP1181BDGG,112 UNIVERSAL SERIAL BUS CONTROLLER, PDSO48
ISP1183BS,157 UNIVERSAL SERIAL BUS CONTROLLER, PQCC32
ISP1362EE,551 UNIVERSAL SERIAL BUS CONTROLLER, PBGA64
ISP1520BD,557 UNIVERSAL SERIAL BUS CONTROLLER, PQFP64
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ISP1181BBSGE 功能描述:IC USB CNTRLR FULL-SPD 48-HVQFN RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:36-QFN(6x6) 包裝:* 其它名稱:Q6396337A
ISP1181BBS-S 功能描述:IC USB HOST CTRL FLL-SPD 48HVQFN RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:36-QFN(6x6) 包裝:* 其它名稱:Q6396337A
ISP1181BBS-T 功能描述:USB 接口集成電路 USB 1.1 DEVICE CONTROLLER RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1181BBSUM 功能描述:IC USB HOST CTRL FLL-SPD 48HVQFN RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:36-QFN(6x6) 包裝:* 其它名稱:Q6396337A
ISP1181BDGG 功能描述:USB 接口集成電路 USB CNTRLR FULL-SPD RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20