參數(shù)資料
型號： ISP1181
廠商： NXP Semiconductors N.V.
英文描述： Full-speed Universal Serial Bus Interface Device(全速通用串行總線接口器件)
中文描述： 全速通用串行總線接口設(shè)備（全速通用串行總線接口器件）
文件頁數(shù)： 7/69頁
文件大?。?/td> 1655K
代理商： ISP1181
Philips Semiconductors
ISP1181
Full-speed USB interface
Objective specification
Rev. 01 — 13 March 2000
7 of 69
9397 750 06896
Philips Electronics N.V. 2000. All rights reserved.
[1]
Symbol names with an overscore (e.g. NAME) represent active LOW signals.
7.
Functional description
The ISP1181 is a full-speed USB interface device with up to 14 configurable
endpoints. It has a fast general-purpose parallel interface for communication with
many types of microcontrollers or microprocessors. It supports different bus
configurations (see
Table 3
) and local DMA transfers of up to 16 bytes per cycle. The
block diagram is given in
Figure 1
.
The ISP1181 has 2462 bytes of internal FIFO memory, which is shared among the
enabled USB endpoints. The type and FIFO size of each endpoint can be individually
configured, depending on the required packet size. Isochronous and bulk endpoints
are double-buffered for increased data throughput. Interrupt IN endpoints can be
configured in rate-feedback mode.
The ISP1181 requires a single supply voltage of 3.0 to 5.5 V and has an internal
3.3 V voltage regulator for powering the analog USB transceiver. It supports
bus-powered operation.
The ISP1181 operates on a 6 MHz oscillator frequency. A programmable clock output
is available up to 48 MHz. During ‘suspend’ state the 24 kHz LazyClock frequency
can be output.
7.1 Analog transceiver
The transceiver is compliant with Universal Serial Bus Specification Rev. 1.1 It
interfaces directly with the USB cable through external termination resistors.
ALE
42
I
address latch enable input; a HIGH-to-LOW transition latches
the level on pin AD0 as address information in a multiplexed
address/data bus configuration; must be tied LOW (connect
to DGND) for a separate address/data bus configuration
chip select input
reset input (Schmitt trigger); a LOW level produces an
asynchronous reset; connect to V
CC
for power-on reset
(internal POR circuit)
programmable clock output (2 mA)
ground supply
crystal oscillator output (6 MHz); connect a fundamental
parallel-resonant crystal; leave this pin open when using an
external clock source on pin XTAL1
crystal oscillator input (6 MHz); connect a fundamental
parallel-resonant crystal or an external clock source (leaving
pin XTAL2 is unconnected)
CS
RESET
43
44
I
I
CLKOUT
GND
XTAL2
45
46
47
O
-
O
XTAL1
48
I
Table 2:
Symbol
[1]
Pin description for TSSOP48
Pin
Type
Description
相關(guān)PDF資料
PDF描述
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ISP1181A 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Full-speed Universal Serial Bus peripheral controller
ISP1181ABS 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Full-speed Universal Serial Bus peripheral controller
ISP1181ABS,518 功能描述:USB 接口集成電路 USB 1.1 ADV DEVICE RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1181ABS,551 功能描述:USB 接口集成電路 USB 1.1 ADVANCED DEVICE RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1181ABS,557 功能描述:USB 接口集成電路 DO NOT USE ORDER -S OR -T PART RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
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