參數資料
型號: ISP1181
廠商: NXP Semiconductors N.V.
英文描述: Full-speed Universal Serial Bus Interface Device(全速通用串行總線接口器件)
中文描述: 全速通用串行總線接口設備(全速通用串行總線接口器件)
文件頁數: 22/69頁
文件大小: 1655K
代理商: ISP1181
Philips Semiconductors
ISP1181
Full-speed USB interface
Objective specification
Rev. 01 — 13 March 2000
22 of 69
9397 750 06896
Philips Electronics N.V. 2000. All rights reserved.
11.2 Resume conditions
For both application modes (powered-on and powered-off) wake-up from ‘suspend’
state is initiated either by the USB host or by the application:
USB host
: drives a K-state on the USB bus (global resume)
Application
: remote wake-up via a HIGH level on input WAKEUP or a LOW level
on input CS (if enabled via bit WKUPCS in the Hardware Configuration Register).
The steps of a wake-up sequence are as follows:
1. The internal oscillator and the PLL multiplier are re-enabled. When stabilized, the
clock signals are routed to all internal circuits of the ISP1181.
2. The SUSPEND output is de-asserted and the RESUME bit in the Interrupt
Register is set. This will generate an interrupt if bit IERESUME in the Interrupt
Enable Register is set.
3. Maximum 15 ms after starting the wake-up sequence the ISP1181 resumes its
normal functionality.
4. In case of a remote wake-up ISP1181 drives a K-state on the USB bus for 10 ms.
5. Following the de-assertion of output SUSPEND, the application restores itself
and other system components to normal operating mode.
6. After wake-up the internal registers of ISP1181 are write-protected to prevent
corruption by inadvertent writing during power-up of external components. The
firmware must send an Unlock Device command to the ISP1181 to restore its full
functionality. See
Section 12.3.2
for more details.
11.3 Control bits in suspend and resume
Table 14: Summary of control bits
Register
Interrupt
Bit
SUSPND
Function
a transition from ‘awake’ to ‘suspend’ state was
detected
monitors USB bus status (logic 1 = suspend);
used when interrupt is serviced
enables output INT to signal ‘suspend’ state
enables SoftConnect pull-up resistor to USB bus
a HIGH-to-LOW transition enables ‘suspend’
state
a HIGH-to-LOW transition enables sending a
10 ms resume signal (K-state)
selects internal (SoftConnect) or external pull-up
resistor
enables wake-up on LOW level of input CS
selects powered-off mode during ‘suspend’ state
sending data AA37H unlocks the internal
registers for writing after a ‘resume’
BUSTATUS
Interrupt Enable
Mode
IESUSP
SOFTCT
GOSUSP
SNDRSU
Hardware
Configuration
EXTPUL
WKUPCS
PWROFF
all
Unlock
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相關代理商/技術參數
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ISP1181ABS,551 功能描述:USB 接口集成電路 USB 1.1 ADVANCED DEVICE RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數據速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1181ABS,557 功能描述:USB 接口集成電路 DO NOT USE ORDER -S OR -T PART RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數據速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20