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參數(shù)資料
| 型號： | ISP1160 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Embedded Universal Serial Bus Host Controller |
| 中文描述： | 嵌入式通用串行總線主控制器 |
| 文件頁數(shù)： | 43/88頁 |
| 文件大?。?/td> | 2044K |
| 代理商： | ISP1160 |
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Philips Semiconductors
ISP1160
Embedded USB Host Controller
Product data
Rev. 04 — 04 July 2003
43 of 88
9397 750 11371
Koninklijke Philips Electronics N.V. 2003. All rights reserved.
10.1.6
HcInterruptDisable register (R/W: 05H/85H)
Each disable bit in the HcInterruptDisable register corresponds to an associated
interrupt bit in the HcInterruptStatus register. The HcInterruptDisable register is
coupled with the HcInterruptEnable register. Thus, writing a logic 1 to a bit in this
register clears the corresponding bit in the HcInterruptEnable register, whereas
writing a logic 0 to a bit in this register leaves the corresponding bit in the
HcInterruptEnable register unchanged. On a read, the current value of the
HcInterruptEnable register is returned.
Code (Hex): 05 —
read
Code (Hex): 85 —
write
Table 17:
Bit
31
HcInterruptEnable register: bit description
Symbol
Description
MIE
MasterInterruptEnable
by the HCD: A logic 0 is ignored by the
HC. A logic 1 enables interrupt generation by events specified in
other bits of this register.
-
reserved
RHSC
0 —
ignore
30 to 7
6
1 —
enable interrupt generation due to Root Hub Status Change
0 —
ignore
5
FNO
1 —
enable interrupt generation due to frame Number Overflow
0 —
ignore
4
UE
1 —
enable interrupt generation due to Unrecoverable Error
0 —
ignore
3
RD
1 —
enable interrupt generation due to Resume Detect
0 —
ignore
2
SF
1 —
enable interrupt generation due to Start of frame
reserved
0 —
ignore
1
0
-
SO
1 —
enable interrupt generation due to Scheduling Overrun
Table 18:
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
HcInterruptDisable register: bit allocation
31
30
MIE
0
0
R/W
R/W
23
22
29
28
27
26
25
24
reserved
0
R/W
19
0
0
0
0
0
R/W
21
R/W
20
R/W
18
R/W
17
R/W
16
reserved
0
0
0
0
0
0
0
0
R/W
15
R/W
14
R/W
13
R/W
12
R/W
11
R/W
10
R/W
9
R/W
8
reserved
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ISP1160BD | Embedded Universal Serial Bus Host Controller |
| ISP1160BM | Embedded Universal Serial Bus Host Controller |
| ISP1161A | Full-speed Universal Serial Bus single-chip host and device controller |
| ISP1161ABD | Full-speed Universal Serial Bus single-chip host and device controller |
| ISP1161ABM | Full-speed Universal Serial Bus single-chip host and device controller |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ISP1160BD | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Embedded Universal Serial Bus Host Controller |
| ISP1160BD,157 | 功能描述:USB 接口集成電路 USB 1.1 HOST CONTROLLER RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ISP1160BD/01 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Embedded Universal Serial Bus Host Controller |
| ISP1160BD/01,118 | 功能描述:USB 接口集成電路 USB HOST CTRL RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ISP1160BD/01,151 | 功能描述:USB 接口集成電路 USB FULL SPEED HOST RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
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