參數(shù)資料
型號： ISP1130DL
廠商： NXP SEMICONDUCTORS
元件分類： 微控制器/微處理器
英文描述： Universal Serial Bus compound hub with integrated keyboard controller
中文描述： SPECIALTY MICROPROCESSOR CIRCUIT, PDSO56
封裝： PLASTIC, SSOP-56
文件頁數(shù)： 32/68頁
文件大小： 1786K
代理商： ISP1130DL
Philips Semiconductors
ISP1130
USB compound hub with keyboard controller
Objective specification
Rev. 01 — 23 March 2000
32 of 68
9397 750 06895
Philips Electronics N.V. 2000. All rights reserved.
9.3.6
Read Chip ID
Reports the chip identification code (12 bits), comprising the device release number
DEVREV (see
Table 8 “Device descriptor”
) and the last digit of the device name
DEVNAME (see
Table 13 “String descriptors”
). Byte 1 contains the least significant
bits of the chip identification code, byte 2 the most significant bits (see
Table 41
and
Table 42
).
Code (Hex) —
FD
Transaction —
read 2 bytes.
Table 39: Embedded Port Status register: bit allocation
Bit
7
Symbol
-
6
-
5
-
4
3
2
1
0
Port
Reset
0
R
Suspend
Change
0
R
Suspend
Connect
Change
0
R
Connect
Reset
Access
X
W
X
W
X
W
0
0
R/W
R/W
Table 40: Embedded Port Status register: bit description
Bit
Symbol
7 to 5
-
4
PortReset
Description
reserved
A logic 1 signals that a Set Port Feature (PORT_RESET) request was received by
the embedded port. If this bit is logic 1, reading it will clear the bit, enable the
embedded port and report the end of the reset to the host.
A logic 1 signals that the value of the Suspend bit has changed. The Suspend bit
changes when the device enters ‘suspend’ mode or when it receives a ‘resume’
signal on its upstream port. This bit is cleared when it is read.
Upon reading this bit indicates the current ‘suspend’ status: A logic 1 indicates
that the embedded port is suspended.
Writing a logic 0 into this bit will generate a remote wake-up, if the embedded port
is suspended (Suspend = 1). Otherwise, writing a logic 0 has no effect.
Remark:
Writing a logic 1 never has any effect.
A logic 1 signals that the value of the Connect bit has changed. This bit is cleared
when it is read.
Writing a logic 1 causes the embedded port to be connected, a logic 0
disconnects the embedded port. Upon reading this bit indicates the current
‘connect’ status.
3
SuspendChange
2
Suspend
1
ConnectChange
0
Connect
Table 41: Chip identification code: bit allocation
Bit
15
Symbol
-
Reset
0
Access
R
Bit
7
Symbol
Reset
0
Access
R
14
-
0
R
6
13
-
0
R
5
12
-
0
R
4
11
10
DEVNAME[3:0]
0
R
2
9
8
0
R
3
0
R
1
1
R
0
DEVREV[7:0]
0
R
0
R
0
R
0
R
0
R
0
R
0
R
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