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參數(shù)資料
| 型號： | ISP1109BS |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 通用總線功能 |
| 英文描述： | Universal Serial Bus transceiver with carkit support |
| 中文描述： | LINE TRANSCEIVER, PQCC32 |
| 封裝： | LEAD FREE, 5 X 5 MM, 0.85 MM HEIGHT, PLASTIC, MO-220, SOT617-1, HVQFN-32 |
| 文件頁數(shù)： | 8/59頁 |
| 文件大小： | 295K |
| 代理商： | ISP1109BS |
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9397 750 13355
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 01 — 14 July 2005
8 of 59
Philips Semiconductors
ISP1109
USB transceiver with carkit support
7.
Functional description
7.1 Serial controller
The serial controller includes the following functions:
Serial Controller interface (SPI or I
2
C-bus)
Device Identification registers
Control registers
Interrupt registers
Interrupt generator.
The serial controller acts as an SPI slave or I
2
C-bus slave.
All the registers are the same as that in SPI or I
2
C-bus mode. In I
2
C-bus mode, the
registers are accessed in 8-bit width (bits 0 to 7) for each address. In SPI mode, there are
25 bits for each address, only bits 0 to 7 are useful while bits 8 to 24 are don’t cares.
At hardware reset including power-on reset, the level on pin SPI_I2C_SEL will determine
whether the SPI or I
2
C-bus interface is active. If SPI_I2C_SEL = LOW, the SPI interface is
selected. If SPI_I2C_SEL = HIGH, the I
2
C-bus interface is selected.
7.2 V
BUS
detector
The V
BUS
detector provides voltage level detection on V
BUS
. If V
BUS
is above the V
BUS
session valid comparator threshold voltage (V
th(svc)
), logic 1 will be stored in
bit VBUS_DET of the Interrupt Source register. If V
BUS
is below V
th(svc)
, logic 0 will be
stored.
7.3 ID detector
In normal power mode, that is, when both V
CC
and V
CC(I/O)
are present, the ID detector
senses the condition of the ID line and can differentiate between the following three
conditions:
ID pin is floating (bit ID_FLOAT = 1)
ID pin is shorted to ground (bit ID_GND = 1)
ID pin is connected to ground through resistor R
DN(ID)
(bits ID_FLOAT and ID_GND
are logic 0).
The recommended procedure to detect the status of ID using software is:
1. When nothing is connected, ID is in the ID_FLOAT state. Enable the ID_FLOAT
interrupt (falling edge).
2. If an interrupt occurs, read the Interrupt Latch register. If ID changes, bit ID_FLOAT is
set.
3. The software waits for sometime, for example: 100 ms, to allow mechanical
debounce.
4. The software reads the Interrupt Source register, and checks bits ID_FLOAT and
ID_GND.
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