參數(shù)資料
型號: ISP1109
廠商: NXP Semiconductors N.V.
英文描述: Universal Serial Bus transceiver with carkit support
中文描述: 與車載通用串行總線收發(fā)器支持
文件頁數(shù): 27/59頁
文件大?。?/td> 295K
代理商: ISP1109
9397 750 13355
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 01 — 14 July 2005
27 of 59
Philips Semiconductors
ISP1109
USB transceiver with carkit support
9.1.3.4
Interrupt Enable High register
The bit allocation of the register is given in
Table 35
. The bits in this register enable
interrupts when the corresponding bits in the Interrupt Source register changes from
logic 0 to logic 1.
9.2 Interrupts
Any of the Interrupt Source register signals given in
Table 29
can generate an interrupt
when the signal becomes either LOW or HIGH. After an interrupt is generated, the SoC
can read the status of each signal and the bit that indicates whether or not that signal
generated the interrupt.
A bit in the Interrupt Latch register is set when any of these occurs:
Writing logic 1 to its set address causes the corresponding bit to be set.
The corresponding bit in the Interrupt Enable High register is set, and the associated
signal changes from LOW-to-HIGH.
The corresponding bit in the Interrupt Enable Low register is set, and the associated
signal changes from HIGH-to-LOW.
Table 35:
Bit
Symbol
Interrupt Enable High register (address Set = 0Eh, Clear = 0Fh) bit allocation
7
6
5
DP_INT_
IEH
IEH
0
0
0
R/S/C
R/S/C
R/S/C
4
3
2
1
0
reserved
ID_FLOAT_
SE1_IEH
ID_GND_
IEH
0
R/S/C
DP_HI_IEH
SESS_VLD
_IEH
0
R/S/C
VBUS_
DET_IEH
0
R/S/C
Reset
Access
0
0
R/S/C
R/S/C
Table 36:
Bit
7
Interrupt Enable High register (address Set = 0Eh, Clear = 0Fh) bit description
Symbol
Description
DP_INT_IEH
0 —
Disable
1 —
Enable.
-
reserved
ID_FLOAT_IEH
0 —
Disable
1 —
Enable.
SE1_IEH
0 —
Disable
1 —
Enable.
ID_GND_IEH
0 —
Disable
1 —
Enable.
DP_HI_IEH
0 —
Disable
1 —
Enable.
SESS_VLD_IEH
0 —
Disable
1 —
Enable.
VBUS_DET_IEH
0 —
Disable
1 —
Enable.
6
5
4
3
2
1
0
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