參數(shù)資料
型號: ISL9N307AS3ST
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: JFETs
英文描述: Global Limit Switches Series 91MCE: Top Plunger with boot seal, 1NO 1NC Direct Opening Snap Action, 1M Cable - Side Exit
中文描述: 75 A, 30 V, 0.007 ohm, N-CHANNEL, Si, POWER, MOSFET, TO-263AB
文件頁數(shù): 5/11頁
文件大?。?/td> 141K
代理商: ISL9N307AS3ST
2002 Fairchild Semiconductor Corporation
Rev. B, January 2002
I
Figure 11. Capacitance vs Drain to Source
Voltage
Figure 12. Gate Charge Waveforms for Constant
Gate Currents
Figure 13. Switching Time vs Gate Resistance
Figure 14. Switching Time vs Gate Resistance
Typical Characteristic
(Continued)
1000
0.1
1
10
5000
100
30
C
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
V
GS
= 0V, f = 1MHz
C
ISS
=
C
GS
+ C
GD
C
OSS
C
DS
+ C
GD
C
RSS
=
C
GD
0
2
4
6
8
10
0
10
20
30
40
50
V
G
,
Q
g
, GATE CHARGE (nC)
V
DD
= 15V
I
D
= 75A
I
D
= 50A
WAVEFORMS IN
DESCENDING ORDER:
0
50
100
250
0
10
20
30
40
50
S
R
GS
, GATE TO SOURCE RESISTANCE (
)
200
150
V
GS
= 4.5V, V
DD
= 15V, I
D
= 16A
t
r
t
d(ON)
t
f
t
d(OFF)
0
50
100
150
200
0
10
20
30
40
50
S
R
GS
, GATE TO SOURCE RESISTANCE (
)
250
300
350
t
d(OFF)
t
r
t
d(ON)
t
f
V
GS
= 10V, V
DD
= 15V, I
D
= 16A
Test Circuits and Waveforms
Figure 15. Unclamped Energy Test Circuit
Figure 16. Unclamped Energy Waveforms
t
P
V
GS
0.01
L
I
AS
+
-
V
DS
V
DD
R
G
DUT
VARY t
P
TO OBTAIN
REQUIRED PEAK I
AS
0V
V
DD
V
DS
BV
DSS
t
P
I
AS
t
AV
0
相關(guān)PDF資料
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ISL9N308AS3ST N-Channel Logic Level UltraFET Trench MOSFETs 30V, 75A, 8m з
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