參數(shù)資料
型號(hào): ISL90842WIV1427Z
廠商: INTERSIL CORP
元件分類: 數(shù)字電位計(jì)
英文描述: Quad Digitally Controlled Variable Resistors
中文描述: QUAD 10K DIGITAL POTENTIOMETER, 2-WIRE SERIAL CONTROL INTERFACE, 256 POSITIONS, PDSO14
封裝: ROHS COMPLIANT, PLASTIC, TSSOP-14
文件頁(yè)數(shù): 8/10頁(yè)
文件大?。?/td> 678K
代理商: ISL90842WIV1427Z
8
FN8096.1
January 16, 2006
The ISL90842 responds with an ACK after recognition of a
START condition followed by a valid Identification Byte, and
once again after successful receipt of an Address Byte. The
ISL90842 also responds with an ACK after receiving a Data
Byte of a write operation. The master must respond with an
ACK after receiving a Data Byte of a read operation
A valid Identification Byte contains 01010 as the five MSBs,
and the following two bits matching the logic values present
at pins A1 and A0. The LSB is the Read/Write bit. Its value is
“1” for a Read operation, and “0” for a Write operation (See
Table 1).
TABLE 1. IDENTIFICATION BYTE FORMAT
Logic values at pins A1, and A0 respectively
0
1
0
1
0
A1
A0
R/W
(MSB)
(LSB)
FIGURE 9. VALID DATA CHANGES, START, AND STOP CONDITIONS
FIGURE 10. ACKNOWLEDGE RESPONSE FROM RECEIVER
FIGURE 11. BYTE WRITE SEQUENCE
SDA
SCL
START
DATA
STABLE
DATA
CHANGE
STOP
DATA
STABLE
SDA OUTPUT FROM
TRANSMITTER
SDA OUTPUT FROM
RECEIVER
8
1
9
START
ACK
SCL FROM
MASTER
HIGH IMPEDANCE
HIGH IMPEDANCE
S
T
A
R
T
S
T
O
P
IDENTIFICATION
BYTE
ADDRESS
BYTE
DATA
BYTE
A
C
K
SIGNALS FROM
THE MASTER
SIGNALS FROM
THE ISL90842
A
C
K
0
0
0
1
1
A
C
K
WRITE
SIGNAL AT SDA
0 0 0 0
A0
A1
0
0 0 0
ISL90842
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