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參數(shù)資料
| 型號： | ISL9003AIRUMZ-T |
| 廠商： | INTERSIL CORP |
| 元件分類： | 基準電壓源/電流源 |
| 英文描述： | Low Noise LDO with Low IQ, High PSRR |
| 中文描述： | 3 V FIXED POSITIVE LDO REGULATOR, 0.325 V DROPOUT, PDSO6 |
| 封裝： | 1.60 X 1.60 MM, ROHS COMPLIANT, PLASTIC, MO-229, UTDFN-6 |
| 文件頁數(shù)： | 8/11頁 |
| 文件大?。?/td> | 210K |
| 代理商： | ISL9003AIRUMZ-T |
8
FN6299.1
December 21, 2006
Block Diagram
Functional Description
The ISL9003A contains all circuitry required to implement a
high performance LDO. High performance is achieved
through a circuit that delivers fast transient response to
varying load conditions. In a quiescent condition, the
ISL9003A adjusts its biasing to achieve the lowest standby
current consumption.
The device also integrates current limit protection, smart
thermal shutdown protection, and soft-start. Smart Thermal
shutdown protects the device against overheating. Soft-start
minimizes start-up input current surges without causing
excessive device turn-on time.
Power Control
The ISL9003A has an enable pin, EN, to control power to the
LDO output. When EN is low, the device is in shutdown
mode. In this condition, all on-chip circuits are off, and the
device draws minimum current, typically less than 0.3
μ
A.
When the EN pin goes high, the device first polls the output
of the UVLO detector to ensure that VIN voltage is at least
2.1V (typical). Once verified, the device initiates a start-up
sequence. During the start-up sequence, trim settings are
first read and latched. Then, sequentially, the bandgap,
reference voltage and current generation circuitry turn on.
Once the references are stable, the LDO powers up.
During operation, whenever the VIN voltage drops below
about 1.84V, the ISL9003A immediately disables the LDO
output. When VIN rises back above 2.1V (assuming the EN
pin is high), the device re-initiates its start-up sequence and
LDO operation resumes automatically.
Reference Generation
The reference generation circuitry includes a trimmed
bandgap, a trimmed voltage reference divider, a trimmed
current reference generator, and an RC noise filter. The filter
includes the external capacitor connected to the CBYP pin.
A 0.01
μ
F capacitor connected CBYP implements a 100Hz
lowpass filter, and is recommended for most high
performance applications. For the lowest noise application, a
0.1
μ
F or greater CBYP capacitor should be used. This filters
the reference noise to below the 10Hz – 1kHz frequency
band, which is crucial in many noise-sensitive applications.
The bandgap generates a zero temperature coefficient (TC)
voltage for the regulator reference and other voltage
references required for current generation and over-
temperature detection.
A current generator provides references required for
adaptive biasing as well as references for LDO output
current limit and thermal shutdown determination.
LDO Regulation and Programmable Output Divider
The LDO Regulator is implemented with a high-gain
operational amplifier driving a PMOS pass transistor. The
design of the ISL9003A provides a regulator that has low
quiescent current, fast transient response, and overall
stability across all operating and load current conditions.
LDO stability is guaranteed for a 1
μ
F to 4.7
μ
F output
capacitor that has a tolerance better than 20% and ESR less
than 200m
Ω
. The design is performance-optimized for a 1
μ
F
capacitor. Unless limited by the application, use of an output
capacitor value above 4.7
μ
F is not recommended as LDO
performance improvement is minimal.
VO
GND
BANDGAP AND
TEMPERATURE
SENSOR
UVLO
VIN
SD
CONTROL
LOGIC
VOLTAGE AND
REFERENCE
GENERATOR
CBYP
1.0V
0.94V
0.9V
GND
SHORT CIRCUIT,
THERMAL PROTECTION,
SOFT-START
+
-
ISL9003A
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| ISL9003AIRUNZ-T | 功能描述:IC REG LDO 3.3V .15A 6-UTDFN RoHS:是 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - 線性 系列:- 標準包裝:2,000 系列:- 穩(wěn)壓器拓撲結(jié)構(gòu):正，可調(diào)式 輸出電壓:1.2 V ~ 5 V 輸入電壓:2.5 V ~ 7 V 電壓 - 壓降（標準）:0.24V @ 800mA 穩(wěn)壓器數(shù)量:1 電流 - 輸出:800mA 電流 - 限制（最小）:1.2A 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:TO-261-5，TO-261AB 供應(yīng)商設(shè)備封裝:SOT-223-5 包裝:帶卷 (TR) 其它名稱:*LP3964EMPX-ADJLP3964EMPX-ADJLP3964EMPX-ADJ-NDLP3964EMPX-ADJ/NOPBTR |
| ISL9003AIRURZ-T | 功能描述:IC REG LDO 2.6V .15A 6-TDFN RoHS:是 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - 線性 系列:- 標準包裝:2,000 系列:- 穩(wěn)壓器拓撲結(jié)構(gòu):正，可調(diào)式 輸出電壓:1.2 V ~ 5 V 輸入電壓:2.5 V ~ 7 V 電壓 - 壓降（標準）:0.24V @ 800mA 穩(wěn)壓器數(shù)量:1 電流 - 輸出:800mA 電流 - 限制（最小）:1.2A 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:TO-261-5，TO-261AB 供應(yīng)商設(shè)備封裝:SOT-223-5 包裝:帶卷 (TR) 其它名稱:*LP3964EMPX-ADJLP3964EMPX-ADJLP3964EMPX-ADJ-NDLP3964EMPX-ADJ/NOPBTR |
| ISL9003IEBZ-T | 制造商:Intersil Corporation 功能描述:PB-FREE W/ANNEAL SINGLE LOW NOISE HIGH PSRR LDO, 1.50V, SC-7 - Tape and Reel 制造商:Intersil Corporation 功能描述:IC REG LDO 1.5V 0.15A SC70-5 制造商:Intersil 功能描述:W/ANNEAL SINGLE LW NOISE IQHI PSRR 1 5V |
| ISL9003IECZ | 制造商:Intersil Corporation 功能描述: |
| ISL9003IECZ-T | 制造商:Intersil Corporation 功能描述:PB-FREE W/ANNEAL SINGLE LOW NOISE HIGH PSRR LDO, 1.80V, SC-7 - Tape and Reel 制造商:Intersil Corporation 功能描述:IC REG LDO 1.8V 0.15A SC70-5 制造商:Intersil 功能描述:W/ANNEAL SINGLE LW NOISE IQHI PSRR 1 5V |
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