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參數(shù)資料
| 型號： | ISL8703IBZT |
| 廠商： | INTERSIL CORP |
| 元件分類： | 數(shù)字信號處理外設 |
| 英文描述： | DSP-ADDRESS SEQUENCER, PDSO14 |
| 封裝： | PLASTIC, MS-012AB, SOIC-14 |
| 文件頁數(shù)： | 7/12頁 |
| 文件大?。?/td> | 351K |
| 代理商： | ISL8703IBZT |
4
FN9250.0
March 14, 2006
Functional Block Diagram
Functional Description
The ISL870X family of ICs provides four delay adjustable
sequenced outputs while monitoring a single distributed voltage
in the nominal range of 2.5V to 24V for both under and
overvoltage. Only when the voltage is in compliance will the
ISL870X initiate the pre-programmed A-B-C-D sequence of the
ENABLE (ISL8700, ISL8702, ISL8704) or ENABLE# (ISL8701,
ISL8703, ISL8705) outputs. Although this IC has a bias range
of 2.5V to 24V (12V for ISL8702) it can monitor any voltage
>1.22V via the external divider if a suitable bias voltage is
otherwise provided.
During initial bias voltage (VIN) application the ISL8700,
ISL8702, ISL8704 ENABLE outputs are held low once
VIN = 1V whereas the ISL8701, ISL8703, ISL8705 ENABLE#
outputs follow the rising VIN. Once VIN > the V bias power on
reset threshold (POR) of 2.0V, VIN is constantly monitored for
compliance via the input voltage resistor divider and the
voltages on the UV and OV pins and reported by the FAULT
output. Internally, voltage regulators generate 3.5V and 1.17V
±5% voltage rails for internal usage once VIN > POR. Once UV
> 1.22V and with the SEQ_EN pin high or open, (SEQ_EN#
must be pulled low on ISL8704, ISL8705) the auto sequence of
the four ENABLE (ENABLE#) outputs begins as the TIME pin
charges its external capacitor with a 2.6A current source. The
voltage on TIME is compared to the internal reference
(VTIME_VTH) comparator input and when greater than
VTIME_VTH the ISL8700, ISL8702, ISL8704 ENABLE_A is
released to go high via an external pull-up resistor or a pull-up
in a DC/DC convertor enable input, for example. Conversely,
ENABLE#_A output will be pulled low at this time on an
ISL8701, ISL8703, ISL8705. The time delay generated by the
external capacitor is to assure continued voltage compliance
within the programmed limits, as during this time any OV or UV
condition will halt the start-up process. TIME cap is discharged
once VTIME_VTH is met.
Once ENABLE_A is active (either released high on the
ISL8700, ISL8702, ISL8704 or pulled low, ISL8701, ISL8703,
ISL8705) a counter is started and using the resistor on TB as a
timing component a delay is generated before ENABLE_B is
activated. At this time, the counter is restarted using the resistor
on TC as its timing component for a separate timed delay until
ENABLE_C is activated. This process is repeated for the
resistor on TD to complete the A-B-C-D sequencing order of
the ENABLE or ENABLE# outputs. At any time during
sequencing if an OV or UV event is registered, all four ENABLE
outputs will immediately return to their reset state; low for
ISL8700, ISL8702, ISL8704 and high for ISL8701, ISL8703,
ISL8705. CTIME is immediately discharged after initial ramp up
thus waiting for subsequent voltage compliance to restart. Once
VIN
VOLTAGE
1.17V
INTERNAL VOLTAGE
REGULATOR
VIN (2.2V MIN - 27V MAX, 14V for ISL8702)
2.0V VIN POR
3.5V
LOGIC
VIN
PROGRAMMABLE
DELAY TIMER
VTIME_VTH
2.6
A
VIN
TB
TC
TD
ENABLE_A
ENABLE_B
ENABLE_C
ENABLE_D
TIME
GND
FAULT
SEQ_EN
UV
OV
+
-
+
eo
VREF
30
s
REFERENCE
ISL8700, ISL8701, ISL8702, ISL8703, ISL8704, ISL8705
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| ISL8704AIBZ | 功能描述:監(jiān)控電路 ADJ QD SEQNCR 14N W/ANNEAL RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復位:Resettable 監(jiān)視器:No Watchdog 電池備用開關:No Backup 上電復位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| ISL8704AIBZ-T | 功能描述:監(jiān)控電路 ADJ QD SEQNCR 14N W/ANNEAL RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復位:Resettable 監(jiān)視器:No Watchdog 電池備用開關:No Backup 上電復位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| ISL8705AIBZ | 功能描述:監(jiān)控電路 ADJ QD SEQNCR 14N W/ANNEAL RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復位:Resettable 監(jiān)視器:No Watchdog 電池備用開關:No Backup 上電復位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| ISL8705AIBZ-T | 功能描述:監(jiān)控電路 ADJ QD SEQNCR 14N W/ANNEAL RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復位:Resettable 監(jiān)視器:No Watchdog 電池備用開關:No Backup 上電復位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| ISL870XEVAL1 | 功能描述:EVAL BOARD 1 FOR ISL870X RoHS:否 類別:編程器，開發(fā)系統(tǒng) >> 評估演示板和套件 系列:* 標準包裝:1 系列:PSoC® 主要目的:電源管理，熱管理 嵌入式:- 已用 IC / 零件:- 主要屬性:- 次要屬性:- 已供物品:板，CD，電源 |
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