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參數(shù)資料
| 型號(hào)： | ISL76322ARZ-TK |
| 廠商： | Intersil |
| 文件頁數(shù)： | 3/13頁 |
| 文件大小： | 0K |
| 描述： | IC VIDEO SERDES LONG 16BIT 48QFN |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 功能： | 串行器/解串器 |
| 輸入類型： | RGB |
| 輸出類型： | 串行 |
| 輸入數(shù)： | 16 |
| 輸出數(shù)： | 1 |
| 電源電壓： | 1.8V, 3.3V |
| 工作溫度： | -40°C ~ 105°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-VFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 48-QFN（7x7） |
| 包裝： | 帶卷 (TR) |
ISL76322
11
December 21, 2013
FN7611.2
suitable (perhaps niobium oxide), but “classic” electrolytic
capacitors frequently have ESR values of above 1
Ω, that nullify
any decoupling effect above the 1kHz to 10kHz frequency range.
Capacitors of 0.1F offer low impedance in the 10MHz to 20MHz
region, and 1000pF capacitors in the 100MHz to 200MHz region.
In general, one of the lower value capacitors should be used at
each supply pin on the IC. Figure 5 shows the grounding of the
various capacitors to the pin corresponding to the supply pin.
Although all the ground supplies are tied together, the PCB layout
should be arranged to emulate this arrangement (at least for the
smaller value (high frequency) capacitors), as much as possible.
I2C Interface
The I2C interface allows access to internal registers used to
configure the SERDES and to obtain status information. A
serializer must be assigned a different address than its
deserializer counterpart if the side channel is used. The upper 5
bits are permanently set to 011 11 and the lower 2 bits
determined by pins as follows:
Thus, 4 SERDES can reside on the same bus. By convention,
when all address pins are tied low, the device address is referred
to as 0x78.
SCL and SDA are open drain to allow multiple devices to share
the bus. If not used, SCL and SDA should be tied to VDD_IO.
Exposed Pad
While it is not a required electrical connection, it is
recommended that the exposed pad on the bottom of the
package be soldered to the circuit board. This will ensure that the
full power dissipation of the package can be utilized. The pad
should be connected to ground and not left floating. For best
thermal conductivity, 16 vias should connect the footprint for the
exposed pad on the circuit board to the ground plane. This
connection is not required for basic operation of the chip.
011
11
I2CA1
I2CA0
R/W
FIGURE 5. POWER SUPPLY BYPASSING
10F
120
0.1F
FIGURE 6. LAYOUT FOR THE EXPOSED PAD
COPPER PAD
VIAS
16x
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