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參數(shù)資料
| 型號： | ISL6406IR |
| 廠商： | INTERSIL CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | Quadruple 2-Input Positive-NAND Gates 14-SO -40 to 85 |
| 中文描述： | SWITCHING CONTROLLER, 770 kHz SWITCHING FREQ-MAX, PQCC16 |
| 封裝： | PLASTIC, MO-220-VHHB, MLFP, QFN-16 |
| 文件頁數(shù)： | 3/18頁 |
| 文件大?。?/td> | 380K |
| 代理商： | ISL6406IR |
11
FN9073.7
January 16, 2007
converter. Note that capacitors CIN and COUT could each
represent numerous physical capacitors.
Dedicate one solid layer, usually a middle layer of the PC
board, for a ground plane and make all critical component
ground connections with vias to this layer. Dedicate another
solid layer as a power plane and break this plane into
smaller islands of common voltage levels. Keep the metal
runs from the PHASE terminals to the output inductor short.
The power plane should support the input power and output
power nodes. Use copper-filled polygons on the top and
bottom circuit layers for the phase nodes. Use the remaining
printed circuit layers for small signal wiring. The wiring traces
from the GATE pins to the MOSFET gates should be kept
short and wide enough to easily handle the 1A of drive
current. The switching components should be placed close
to the ISL6406 first. Minimize the length of the connections
between the input capacitors, CIN, and the power switches
by placing them nearby. Position both the ceramic and bulk
input capacitors as close to the upper MOSFET drain and
islands as possible. Position the output inductor and output
capacitors between the upper and lower MOSFETs and the
load.
The critical small signal components include any bypass
capacitors, feedback components, and compensation
components. Position the bypass capacitor, CBP, close to
the VCC pin with a via directly to the ground plane. Place
the PWM converter compensation components close to the
FB and COMP pins. The feedback resistors for both
regulators should also be located as close as possible to
the relevant FB pin with vias tied straight to the ground
plane as required.
Feedback Compensation
Figure 7 highlights the voltage-mode control loop for a
synchronous-rectified buck converter. The output voltage
(VOUT) is regulated to the Reference voltage level. The error
amplifier (Error Amp) output (VE/A) is compared with the
oscillator (OSC) triangular wave to provide a pulse-width
modulated (PWM) wave with a peak amplitude of VIN at the
PHASE node. The PWM wave is smoothed by the output
filter (L and CO).The modulator transfer function is the
small-signal transfer function of VOUT/VE/A. This function is
dominated by a DC Gain and the output filter (LO and CO),
with a double pole break frequency at FLC and a zero at
FESR. The DC Gain of the modulator is simply the input
voltage (VIN) divided by the peak-to-peak oscillator voltage,
VOSC.
Modulator Break Frequency Equations
The compensation network consists of the error amplifier
(internal to the ISL6406) and the impedance networks ZIN
and ZFB.The goal of the compensation network is to provide
a closed-loop transfer function with the highest 0dB crossing
frequency (f 0dB ) and adequate phase margin. Phase
margin is the difference between the closed loop phase at
f 0dB and 180°.
The equations below relate the compensation network’s
poles, zeros and gain to the components (R1, R2, R3, C1, C2
poles and zeros of the compensation network:
1. Pick gain (R2/R1) for desired converter bandwidth.
2. Place first zero below filter’s double pole (~75% FLC).
3. Place second zero at filter’s double pole.
4. Place first pole at the ESR zero.
5. Place second pole at half the switching frequency.
6. Check gain against error amplifier’s open-loop gain.
7. Estimate phase margin—repeat if necessary.
FIGURE 7. VOLTAGE-MODE BUCK CONVERTER
COMPENSATION DESIGN
VOUT
REFERENCE
LO
CO
ESR
VIN
ΔVOSC
ERROR
AMP
PWM
DRIVER
(PARASITIC)
ZFB
+
-
REFERENCE
R1
R3
R2
C3
C1
C2
COMP
VOUT
FB
ZFB
ISL6406
ZIN
COMPARATOR
DRIVER
DETAILED COMPENSATION COMPONENTS
PHASE
VE/A
+
-
+
-
ZIN
OSC
f
LC
1
2
Π L
O CO
-----------------------------
=
(EQ. 4)
f
ESR
1
2
Π ESR
() C
O
()
----------------------------------------
=
(EQ. 5)
ISL6406
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| ISL6406IR-T | 功能描述:IC REG CTRLR BUCK PWM VM 16-QFN RoHS:否 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - DC DC 切換控制器 系列:- 標準包裝:4,000 系列:- PWM 型:電壓模式 輸出數(shù):1 頻率 - 最大:1.5MHz 占空比:66.7% 電源電壓:4.75 V ~ 5.25 V 降壓:是 升壓:無 回掃:無 反相:無 倍增器:無 除法器:無 Cuk:無 隔離:無 工作溫度:-40°C ~ 85°C 封裝/外殼:40-VFQFN 裸露焊盤 包裝:帶卷 (TR) |
| ISL6406IRZ | 功能描述:IC REG CTRLR BUCK PWM VM 16-QFN RoHS:是 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - DC DC 切換控制器 系列:- 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:2,500 系列:- PWM 型:電流模式 輸出數(shù):1 頻率 - 最大:275kHz 占空比:50% 電源電壓:18 V ~ 110 V 降壓:無 升壓:無 回掃:無 反相:無 倍增器:無 除法器:無 Cuk:無 隔離:是 工作溫度:-40°C ~ 85°C 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 包裝:帶卷 (TR) |
| ISL6406IRZ-T | 功能描述:IC REG CTRLR BUCK PWM VM 16-QFN RoHS:是 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - DC DC 切換控制器 系列:- 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:2,500 系列:- PWM 型:電流模式 輸出數(shù):1 頻率 - 最大:275kHz 占空比:50% 電源電壓:18 V ~ 110 V 降壓:無 升壓:無 回掃:無 反相:無 倍增器:無 除法器:無 Cuk:無 隔離:是 工作溫度:-40°C ~ 85°C 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 包裝:帶卷 (TR) |
| ISL6406IV | 功能描述:IC REG CTRLR BUCK PWM VM 16TSSOP RoHS:否 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - DC DC 切換控制器 系列:- 標準包裝:4,000 系列:- PWM 型:電壓模式 輸出數(shù):1 頻率 - 最大:1.5MHz 占空比:66.7% 電源電壓:4.75 V ~ 5.25 V 降壓:是 升壓:無 回掃:無 反相:無 倍增器:無 除法器:無 Cuk:無 隔離:無 工作溫度:-40°C ~ 85°C 封裝/外殼:40-VFQFN 裸露焊盤 包裝:帶卷 (TR) |
| ISL6406IV-T | 功能描述:IC REG CTRLR BUCK PWM VM 16TSSOP RoHS:否 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - DC DC 切換控制器 系列:- 標準包裝:4,000 系列:- PWM 型:電壓模式 輸出數(shù):1 頻率 - 最大:1.5MHz 占空比:66.7% 電源電壓:4.75 V ~ 5.25 V 降壓:是 升壓:無 回掃:無 反相:無 倍增器:無 除法器:無 Cuk:無 隔離:無 工作溫度:-40°C ~ 85°C 封裝/外殼:40-VFQFN 裸露焊盤 包裝:帶卷 (TR) |
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