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參數(shù)資料
| 型號(hào)： | ISL61861DCBZ |
| 廠商： | Intersil |
| 文件頁數(shù)： | 7/18頁 |
| 文件大?。?/td> | 717K |
| 描述： | IC USB PWR CTRLR 3A 8SOIC |
| 標(biāo)準(zhǔn)包裝： | 980 |
| 類型： | 熱交換開關(guān) |
| 應(yīng)用： | USB 過電流保護(hù)控制器 |
| 內(nèi)部開關(guān)： | 是 |
| 電流限制： | 3A |
| 電源電壓： | 2.5 V ~ 5.5 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-SOIC |
| 包裝： | 管件 |
ISL6186
7
FN7698.2
November 3, 2011
Introduction
The ISL6186 is a single channel overcurrent (OC) fault protection
IC for the +2.5V to +5V environment. Each ISL6186 has a 45m?
P-channel MOSFET power switch for power control. An enabling
input and fault reporting output compatible with 2.5V to 5V logic
allows for external control and reporting. This device features an
integrated power switch with current monitoring, accurate
current limiting, reverse bias protection, and current limited
timed delay to turn-off for system reliability. See Figures 11
through 27 for typical operational waveforms including both
undercurrent and overcurrent situations.
The ISL6186 offers current sense and limiting with V
IN
=5V to
guarantee continuous current levels of 1.5A, 3A and 3.6A, making
these devices well suited for a myriad of USB and other low-power
(18W max) port power management applications and
configurations.
The ISL6186 also provides thermally insensitive timed OC turn-off
and fault notification, isolating and protecting the voltage bus in the
event of a peripheral OC or short circuit independent of the ambient
thermal condition.
The ISL6186 undervoltage lockout feature prevents turn-on of
the output unless the correct ENABLE state and V
IN
> V
UVLO
are
present. During initial turn-on, the ISL6186 prevents false fault
reporting by blanking the fault signal.
During operation, once an OC condition is detected, the output
is current limited for t
CL
to allow transient OC conditions to
pass. If still in current limit after the current limit period has
elapsed, the output is then turned off and the fault is reported
by pulling the FAULT
output low. On the latch-off options, after
turn-off, both the output and the FAULT
signal are latched low
until reset by the enable signal being de-asserted or a POR
occurring. At this time, the FAULT
signal will clear and the
switch is ready to be turned back on. On the auto restart
options, the ISL6186 will attempt to periodically turn on the
output as long as the enable is asserted.
When disabled, the ISL6186 has a low quiescent supply current
and output to input reverse current flow blocking capability.
The ISL6186 family is provided with enable polarity options and
an industry standard 8 Ld SOIC pinout along with two versions in
the 70% smaller 3x3 DFN. The 8 Ld DFN package offers the
same performance as the 8Ld SOIC whereas the 10 Ld DFN
offers higher current capability in the smallest possible package
due to its lower package electrical and thermal resistance.
Additionally, the 10 Ld DFN has a Power-Good output PGD
that
pulls low 40ms after V
OUT
>90% of V
IN
and rises after V
OUT
<85%
of V
IN
.
Ren_h ENABLE Pull-Down Resistor
Enable asserted high options
0.6 1 1.55 M?/DIV>
Ren_l ENABLE
Pull-Up Resistor
Enable asserted low options
0.6 1 1.55 M?/DIV>
t
ON
Enable to Output Turn-on Time R
L
= 10? C
L
= 10礔, Enable 50% to Output 90%
- 0.1 -
ms
t
OFF
Enable to Output Turn-off Time R
L
= 10? C
L
= 10礔, Enable 50% to Output 10%
- 0.25 -
ms
t
pdPGr
Enable to Power Good Output Rising
Time
Disable to Power-Good De-assert
- 30 -
ns
PG Vth Power Good Threshold
PGD pulls low when V
OUT
/V
IN
88 91 95
%
PGN Vth Power Not Good Threshold
PGD release high when V
OUT
/V
IN
78 86 93
%
t
Vthr2PG
PG Vth to PG
Falling
PG
delay after PG Vth
- 1.5 -
祍
t
Vthf2PG
PGN Vth to PG
Rising
PG
delay after PGN Vth
- 45 -
祍
BIAS PARAMETERS
I
VDD
Enabled V
IN
Current
Switches Closed, OUTPUT = OPEN
- 57 75 礎(chǔ)
I
VDD
Disabled V
IN
Current
Switches Open, OUTPUT = OPEN
- 3.5 5.5 礎(chǔ)
V
UVLO
Rising POR Threshold
V
IN
Rising to functional operation
- 2.1 2.3
V
I
VR
Reverse Blocking Leakage Current V
IN
= 0V, V
OUT
= 5V
- 0.3 2.0 礎(chǔ)
Temp_dis Over-Temperature Disable
- 150 -
癈
Temp_hys Over-Temperature Hysteresis
- 20 -
癈
NOTE:
8. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.
Electrical Specifications V
IN
= 5V, T
A
= T
J
, Unless Otherwise Specified. Boldface limits apply over the operating temperature
range, 0癈 to +75癈 or -40癈 to +85癈. (Continued)
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
(Note 8) TYP
MAX
(Note 8) UNITS
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ISL61861DCBZ-T | 功能描述:熱插拔功率分布 SINGLE USB HOTSWAP 3A/RETRY 8LD RoHS:否 制造商:Texas Instruments 產(chǎn)品:Controllers & Switches 電流限制: 電源電壓-最大:7 V 電源電壓-最小:- 0.3 V 工作溫度范圍: 功率耗散: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Tube |
| ISL61861DIBZ | 功能描述:熱插拔功率分布 SINGLE USB HOTSWAP 3A/RETRY 8LD RoHS:否 制造商:Texas Instruments 產(chǎn)品:Controllers & Switches 電流限制: 電源電壓-最大:7 V 電源電壓-最小:- 0.3 V 工作溫度范圍: 功率耗散: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Tube |
| ISL61861DIBZ-T | 功能描述:熱插拔功率分布 SINGLE USB HOTSWAP 3A/RETRY 8LD RoHS:否 制造商:Texas Instruments 產(chǎn)品:Controllers & Switches 電流限制: 電源電壓-最大:7 V 電源電壓-最小:- 0.3 V 工作溫度范圍: 功率耗散: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Tube |
| ISL61861ECBZ | 功能描述:熱插拔功率分布 SINGLE USB HOTSWAP W 5A/LATCH 8LD RoHS:否 制造商:Texas Instruments 產(chǎn)品:Controllers & Switches 電流限制: 電源電壓-最大:7 V 電源電壓-最小:- 0.3 V 工作溫度范圍: 功率耗散: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Tube |
| ISL61861ECBZ-T | 功能描述:熱插拔功率分布 SINGLE USB HOTSWAP W 5A/LATCH 8LD RoHS:否 制造商:Texas Instruments 產(chǎn)品:Controllers & Switches 電流限制: 電源電壓-最大:7 V 電源電壓-最小:- 0.3 V 工作溫度范圍: 功率耗散: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Tube |
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