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參數(shù)資料
| 型號： | ISL55141IVZ |
| 廠商： | Intersil |
| 文件頁數(shù)： | 12/14頁 |
| 文件大小： | 0K |
| 描述： | IC COMP CMOS HS 18V 14-TSSOP |
| 標準包裝： | 960 |
| 類型： | 窗口 |
| 元件數(shù)： | 1 |
| 電壓 - 電源，單路/雙路(±)： | 10 V ~ 18 V |
| 電壓 - 輸入偏移（最小值）： | 50mV @ -3V，12V |
| 電流 - 輸入偏壓（最小值）： | 0.025µA @ -3V，12V |
| 電流 - 靜態(tài)（最大值）： | 12.5mA |
| 傳輸延遲（最大）： | 15ns |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 14-TSSOP（0.173"，4.40mm 寬） |
| 安裝類型： | 表面貼裝 |
| 包裝： | 管件 |
7
FN6230.3
April 4, 2013
The maximum power dissipation allowed in a package is
determined according to Equation 1.
where:
TJMAX = Maximum junction temperature
TAMAX = Maximum ambient temperature
θJA = Thermal resistance of the package
PDMAX = Maximum power dissipation in the package
Approximate Power Dissipation
(Typ) P = N*[(VCC-VEE)*8.25mW + 90pF*(VCC-VEE)^2*f +
CL*(VOH-VOL)^2*f]
where:
N is the number of comparators in the chip
(1 for ISL55141, 2 for ISL55142 and 4 for ISL55143).
(f) is the operating frequency.
CL is the load capacitor.
The power dissipation calculated from the above formula
may have an error of ±20 to 25%.
The maximum power dissipation actually produced by an IC
is the total quiescent supply current times the total power
supply voltage, plus the power in the IC due to the loads.
Power also depends on the number of channels changing
state and frequency of operation. The extent of continuous
active pattern generation/reception will greatly affect
dissipation requirements.
The user should evaluate various heat sink/cooling options
in order to control the ambient temperature part of the
equation. This is especially true if the user’s applications
require continuous, high-speed operation.
Note: The reader is cautioned against assuming the same
level of thermal performance in actual applications. A careful
inspection of conditions in your application should be
conducted.
Power Supply Information
Circuit design must always take into account the internal
EOS/ESD protection structure of the device.
Important Note: The QFN package metal plane is used for
heat sinking of the device. It is electrically connected to the
negative supply potential (VEE). If VEE is tied to ground, the
thermal pad can be connected to ground. Otherwise, the
thermal pad (VEE) must be isolated from other power
planes.
Power Supply Sequencing
The ISL55141, ISL55142, ISL55143 reference every supply
with respect to VEE. Therefore, apply VEE, VOL then VCC
followed by the CVA and CVB supplies. The comparator
VINP pin should not exceed VEE or VCC during power-up.
In cases where inputs may exceed voltage rails during
power-up, series resistance should be employed to
safeguard EOS to the ESD protection diodes.
P
DMAX
T
JMAX - TAMAX
Θ
JA
---------------------------------------------
=
(EQ. 1)
VEE
VOH
VINP
OPTIONAL PROTECTION
VCC
DIODE
OPTIONAL PROTECTION
DIODE
QA
QB
VOL
CVA
CVB
ISL55141, ISL55142, ISL55143
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參數(shù)描述 |
|---|---|
| ISL55141IVZEVAL1Z | 功能描述:EVALUATION BOARD FOR ISL55141IVZ RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估演示板和套件 系列:* 標準包裝:1 系列:PCI Express® (PCIe) 主要目的:接口，收發(fā)器，PCI Express 嵌入式:- 已用 IC / 零件:DS80PCI800 主要屬性:- 次要屬性:- 已供物品:板 |
| ISL55141IVZ-T | 功能描述:IC COMP CMOS HS 18V 14-TSSOP RoHS:是 類別:集成電路 (IC) >> 線性 - 比較器 系列:- 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:2,500 系列:- 類型:通用 元件數(shù):1 輸出類型:CMOS，推挽式，滿擺幅，TTL 電壓 - 電源，單路/雙路(±):2.5 V ~ 5.5 V，±1.25 V ~ 2.75 V 電壓 - 輸入偏移（最小值）:5mV @ 5.5V 電流 - 輸入偏壓（最小值）:1pA @ 5.5V 電流 - 輸出（標準）:- 電流 - 靜態(tài)（最大值）:24µA CMRR, PSRR（標準）:80dB CMRR，80dB PSRR 傳輸延遲（最大）:450ns 磁滯:±3mV 工作溫度:-40°C ~ 85°C 封裝/外殼:6-WFBGA，CSPBGA 安裝類型:表面貼裝 包裝:管件 其它名稱:Q3554586 |
| ISL55142 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:High-Speed 18V CMOS Comparators |
| ISL55142IRZ | 功能描述:IC COMP CMOS HS 18V 20-QFN RoHS:是 類別:集成電路 (IC) >> 線性 - 比較器 系列:- 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:2,500 系列:- 類型:通用 元件數(shù):1 輸出類型:CMOS，推挽式，滿擺幅，TTL 電壓 - 電源，單路/雙路(±):2.5 V ~ 5.5 V，±1.25 V ~ 2.75 V 電壓 - 輸入偏移（最小值）:5mV @ 5.5V 電流 - 輸入偏壓（最小值）:1pA @ 5.5V 電流 - 輸出（標準）:- 電流 - 靜態(tài)（最大值）:24µA CMRR, PSRR（標準）:80dB CMRR，80dB PSRR 傳輸延遲（最大）:450ns 磁滯:±3mV 工作溫度:-40°C ~ 85°C 封裝/外殼:6-WFBGA，CSPBGA 安裝類型:表面貼裝 包裝:管件 其它名稱:Q3554586 |
| ISL55142IRZ-T | 功能描述:IC COMP CMOS HS 18V 20-QFN RoHS:是 類別:集成電路 (IC) >> 線性 - 比較器 系列:- 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:2,500 系列:- 類型:通用 元件數(shù):1 輸出類型:CMOS，推挽式，滿擺幅，TTL 電壓 - 電源，單路/雙路(±):2.5 V ~ 5.5 V，±1.25 V ~ 2.75 V 電壓 - 輸入偏移（最小值）:5mV @ 5.5V 電流 - 輸入偏壓（最小值）:1pA @ 5.5V 電流 - 輸出（標準）:- 電流 - 靜態(tài)（最大值）:24µA CMRR, PSRR（標準）:80dB CMRR，80dB PSRR 傳輸延遲（最大）:450ns 磁滯:±3mV 工作溫度:-40°C ~ 85°C 封裝/外殼:6-WFBGA，CSPBGA 安裝類型:表面貼裝 包裝:管件 其它名稱:Q3554586 |
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