參數(shù)資料
型號： ISL55036EVAL1Z
廠商： Intersil
文件頁數(shù)： 4/11頁
文件大小： 0K
描述： EVAL BOARD 1 FOR ISL55036
標(biāo)準(zhǔn)包裝： 1
系列： *
2
FN6640.1
September 11, 2008
Pin Descriptions
24 LD TQFN
PIN NAME
EQUIVALENT
CIRCUIT
DESCRIPTION
1
IN+_2
Circuit 1
Amplifier 2 non-inverting input
2
IN+_3
Circuit 1
Amplifier 3 non-inverting input
3
GND_IN(1, 2, 3)
Circuit 4
Common reference input for Amplifiers 1, 2, 3
4EN(4, 5, 6)
Circuit 2
Enable pin internal pull-down; Logic “1” selects the disabled state; Logic “0” selects
the enabled state. Channels 4, 5, 6
5
V+(4, 5, 6)
Circuit 5
Positive power supply for Channels 4, 5, 6.
6
IN+_4
Circuit 1
Amplifier 4 non-inverting input
7
IN+_5
Circuit 1
Amplifier 5 non-inverting input
8
IN+_6
Circuit 1
Amplifier 6 non-inverting input
9
GND_IN(4, 5, 6)
Circuit 5
Common reference input for Amplifiers 4, 5, 6
10
GND_PWR(4, 5, 6)
Circuit 5
Power supply ground for Channels 4, 5, 6.
11
GND_OUT(4, 5, 6)
Circuit 3
Output power supply ground for Channels 4, 5, 6.
12
OUT_ 6
Circuit 3
Amplifier 6 output
13
OUT_ 5
Circuit 3
Amplifier 5 output
14
OUT_4
Circuit 3
Amplifier 4 output
15
V+_OUT(4, 5, 6)
Circuit 3
Output power supply for Channels 4, 5, 6.
16
GND_PWR(1, 2, 3)
Circuit 4
Power supply ground Channels 1, 2, 3.
17
GND_OUT(1, 2, 3)
Circuit 3
Output power supply ground Channels 1, 2, 3.
18
OUT_3
Circuit 3
Amplifier 3 output
19
OUT_2
Circuit 3
Amplifier 2 output
20
OUT_1
Circuit 3
Amplifier 1 output
21
V+_OUT(1, 2, 3)
Circuit 3
Output power supply Channels 1, 2, 3.
22
EN(1, 2, 3)
Circuit 2
Enable pin internal pull-down; Logic “1” selects the disabled state; Logic “0” selects
the enabled state. Channels 1, 2, 3
23
V+(1, 2, 3)
Circuit 4
Positive power supply for Channels 1, 2, 3.
24
IN+_1
Circuit 1
Amplifier 1 non-inverting input
Thermal Pad
Circuit 6
Thermal heat sink pad makes electrical contact the IC substrate and must be
connected to same ground potential as the ground pins.
IN+
V+
GND_PWR
EN
V+
21k
+
-
1.2V
V+_OUT(1, 2, 3)
GND_OUT(1, 2, 3)
OUT(1, 2, 3)
CIRCUIT 3
CIRCUIT 2
CIRCUIT 1
GND_PWR (1,2,3)
~1M
Ω
SUBSTRATE 1
THERMAL HEAT SINK PAD
~1M
Ω
SUBSTRATE 2
CIRCUIT 4
+
-
+
-
+
-
GND_IN-(1,2,3)
GND_PWR(1,2,3)
CIRCUIT 5
+
-
+
-
+
-
GND_IN-(4, 5, 6)
GND_PWR(4, 5, 6)
V+_OUT(4, 5, 6)
OUT(4, 5, 6)
GND_OUT(4, 5, 6)
V+(1, 2, 3)
V+(4,5,6)
CIRCUIT 6
GND(4, 5, 6)
1.5k
500
1.5k
500
GND_PWR
dv/dt
CLAMP
ISL55036
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