16 Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems as noted in the quality" />
參數(shù)資料
型號: ISL54200EVAL1Z
廠商: Intersil
文件頁數(shù): 8/18頁
文件大?。?/td> 0K
描述: EVALUATION BOARD FOR ISL54200
標(biāo)準(zhǔn)包裝: 1
主要目的: 接口,2:1 多路復(fù)用器
嵌入式:
已用 IC / 零件: ISL54200
主要屬性: 2 x SPDT 模擬開關(guān)
次要屬性: 2.7 V ~ 5.5 V 電源
已供物品:
ISL54200
16
Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems as noted
in the quality certifications found at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications
at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by
Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any
infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any
patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN6408.2
June 17, 2010
For additional products, see www.intersil.com/product_tree
Products
Intersil Corporation is a leader in the design and manufacture of high-performance analog semiconductors. The
Company's products address some of the industry's fastest growing markets, such as, flat panel displays, cell phones,
handheld products, and notebooks. Intersil's product families address power management and analog signal
processing functions. Go to www.intersil.com/products for a complete list of Intersil product families.
*For a complete listing of Applications, Related Documentation and Related Parts, please see the respective device
information page on intersil.com: ISL54200
To report errors or suggestions for this datasheet, please go to www.intersil.com/askourstaff
FITs are available from our website at http://rel.intersil.com/reports/search.php
Revision History
DATE
REVISION
CHANGE
5/17/10
FN6408.2
Updated Pb-free bullet in “Features” on page 1 and Pb-free notes 3 and 4 in “Ordering
Information” on page 2 per Mark Kwoka's new verbiage based on lead finish. Added TB347 link
note 2 to “Ordering Information” on page 2 for reel specifications.
θJC for both TDFN and uTQFN packages. Updated
θJA for TQFN from 140 to 145. Added applicable θJA/θJC notes 7 through 10.
Changed “Positive Supply Current, IDD” on page 6 for full temp from: 80nA to 500nA
Limit changes required to improve yield (PCN required)
Changes to “L10.2.1x1.6A” on page 17 as follows:
Converted to new POD format (Moved dimensions from table onto drawing)
Corrected leadframe thickness in Detail x from 0.2 REF to 0.125 REF
Corrected Note 4 to read "...between 0.15mm and 0.30mm...", it previously read
"...between .015mm and 0.30mm..."
Corrected the word "indentifier" in Note 8 to read "identifier".
Changes to “L10.3x3A” on page 18 as follows:
Added Typical Recommended Land Pattern
Put into new data sheet format. Changes include:
Added MSL note 5 to “Ordering Information” on page 2
Added "Boldface limits apply over the operating temperature range, -40°C to +85°C." to
common conditions of "Electrical Specfications" table beginning on page 4. Bolded applicable
specs.
Updated the “Pin Descriptions” on page 3 to show the thermal pad.
7/11/07
FN6408.1
Made changes to Bandwidth in “DYNAMIC CHARACTERISTICS” on page 5
On page 11 to page 14, made changes to eye diagram axis labels
ISL54200
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